Chip component assembly manufacturing method

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...

Reexamination Certificate

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Details

C438S113000, C438S125000, C438S126000, C438S455000, C438S458000, C438S460000

Reexamination Certificate

active

06482677

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a chip component assembly in which a plurality of chip components are bonded together in a stack and bump electrodes of the chip components are connected together for providing circuit continuity and to a manufacturing method therefor.
A high-density information network society will be realized in the twenty-first century, and information communications equipment for use in the society is required to have high-speed highly-improved functions including sound and image digital processing together, a small size, a light weight and a low consumption of power. The quantity of information to be handled by such information communications equipment is expected to be explosively increased. In contrast to this, the increasing speed of CPU's for executing information processing tends to be unable to be followed by only the improvement in ability of LSI's, and the importance of the mounting technologies is increasingly recognized. The mounting technologies have coped with the increase in speed of signals by technological improvement based mainly on the packaging of DIP, TSOP, BGA and so on and technological improvement with the introduction of a high-density wiring board such as a build-up board.
However, it is anticipated that the prior art technological improvement based on the presupposition of a circuit pattern formed on a surface will reach the limit of improvement in several years.
Accordingly, attention is paid to the technology of stacking chip components obtained by cutting a semiconductor wafer or an insulating substrate provided with a circuit into an LSI.
Conventionally, as the above-mentioned chip component stacking technology, it is considered to adopt the conventional stacking technology. For example, a circuit is constructed on a semiconductor wafer or an insulating substrate, and thereafter, the semiconductor wafer or the insulating substrate is cut into individual chip components by a dicing saw. Thereafter, these chip components are aligned, stacked, stuck together by means of a non-conductive film (NCF), a non-conductive paste (NCP), an anisotropic conductive film (ACF) or an anisotropic conductive paste (ACP) and sealed. At the same time, the mechanical fixation and electrical circuit continuity of the chip components are achieved.
However, the conventional technology of handling chip components as bulk components and stacking the components tends to apply friction and impact to the chip components, easily causing damage such as the cracking of chip components and easily causing the warp of chip components. Furthermore, with the reduction in size of the chip components, it is difficult to handle very small thin chip components and correctly position the components. For example, it is very difficult to transfer an encapsulation material.
SUMMARY OF THE INVENTION
In view of the aforementioned problems of the conventional chip component stacking technology, the present invention has the object of providing a chip component assembly manufacturing method capable of easily handling even small-size thin chip components, scarcely causing the damage and warp of the chip components and correctly stacking the chip components and a chip component assembly assembled by the method.
According. to the present invention, in order to achieve the aforementioned object, a substrate of a semiconductor wafer, an insulating substrate or the like on which a circuit is formed is cut with the substrate supported on a sheet, and thereafter, the chip components obtained by the cutting are handled while being supported on the sheet. That is, in the state in which the substrate of a semiconductor wafer, an insulating substrate or the like on which the circuit is formed is supported on the sheet, a sealing material is given to the substrate or the chip components obtained by cutting the substrate before or after the cutting of the substrate. The chip components are directly picked up from the sheet by peeling off the components, and the chip components are successively stacked on the sheet.
In order to achieve the above object, there is provided a method for manufacturing a chip component assembly in which a plurality of chip components are stuck together in a stack and bump electrodes of the chip components are bonded together for achieving circuit continuity, comprising the steps of:
dividing on a sheet a substrate, on which the bump electrodes and a circuit are formed, into individual chip components;
forming a layer of a sealing material on a surface that includes the bump electrodes of the chip components before or after the dividing step; and
picking up the divided chip components by peeling each component off the sheet and sticking the chip component onto another chip component in a stack by means of the sealing material, wherein the picking up and sticking steps are repeated to stack a desired number of chip components, thereafter the chip component located in a lowermost stratum is peeled off the sheet and the bump electrodes of upper and lower chip components are connected to each other.
According to the chip component assembly manufacturing method as described above, the chip components divided by cutting on the sheet are handled in the state in which the components are supported on the sheet. Therefore, in comparison with the case where the chip components in the bulk state are handled, the processes of aligning, conveying and so on of the chip component become unnecessary, and even thin chip components can easily be handled. Moreover, the chip components are aligned on the sheet, and therefore, the processes of aligning and conveying the chip components in the bulk state also become unnecessary. With this arrangement, neither external force nor impact is applied to the chip components, and, even in the case of thin chip components, the occurrence of cracking and warp of the components can be eliminated. Furthermore, the chip components held in specified positional relations on the sheet are handled. Therefore, the positioning becomes easy, and this allows small chip components to be positioned and stacked on one another with high accuracy.
The layer of the sealing material is preliminarily formed on the sheet and stuck to a lower surface of the substrate placed on the sealing material or is formed on an upper surface of the substrate before cutting or on an upper surface of the chip component after cutting. The sealing material is provided by, for example, a non-conductive film (NCF), a non-conductive paste (NCP), an anisotropic conductive film (ACF) or an anisotropic conductive paste (ACP).
The chip component picked up firstly from the sheet is picked up while being stuck to an interposer that concurrently serves as a base material of the chip component assembly. Conversely, it is acceptable to stack the desired number of chip components and thereafter stick the components to the interposer.
The desired number of chip components is stacked on the sheet, and thereafter, the components are subjected to regular pressure bonding on the pressure-bonding stage. It is also acceptable to stack chip components on one another while subjecting the chip components to temporary pressure bonding and finally perform the regular pressure bonding on the pressure-bonding stage.
The chip component assembly obtained by the manufacturing method described above is a chip component assembly in which a plurality of chip components are stuck together in a stack and the bump electrodes of the chip components are bonded together for achieving circuit continuity, the assembly having the plurality of chip components stacked on one another, the bump electrodes that are formed on the principal surface of these chip components and bonded to the electrodes of the other stacked chip components and the sealing material that sticks the plurality of stacked chip components together.


REFERENCES:
patent: 6040204 (2000-03-01), Herden et al.
patent: 6291259 (2001-09-01), Chun
patent: 6355501 (2002-03-01), Fung et al.
patent: 6235554 (2002-05-01), Akram

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