Plate pattern forming method and its inspecting method

Radiation imagery chemistry: process – composition – or product th – Including control feature responsive to a test or measurement

Reexamination Certificate

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Details

C382S145000, C382S149000, C382S151000

Reexamination Certificate

active

06413688

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to a plate pattern forming method and its inspecting method in the case of forming a reticle pattern, and a mask pattern for a semiconductor device, a flat display, a magnetic device, or a device pattern, or the like (generically referred to as a plate pattern). More particularly, the present invention relates to a plate pattern forming method and its inspecting method in which a detection ratio of pseudo defects in a pattern inspection process is lowered, so that the number of steps in the inspection process is lessened.
2. Description of the Related Arts
The mask pattern is formed on a mask substrate for the semiconductor device, the flat display such as a PDP, LCD, or the like, the magnetic device, or the like, and the actual device pattern is formed on a wafer or display substrate by utilizing the mask. Various combinations depending on the fining degree exist in the method for forming the mask pattern, or device pattern.
As one example, assume that a description is made in the case of a VLSI device, based on design data in which a circuit design is ended, a layout pattern is designed by utilizing a CAD, and the CAD data are converted into exposure data, and the mask pattern is formed according to the exposure data. The process of forming this mask pattern comprises, for example, an electronic beams exposing step, a developing step, and a succeeding etching step according to the exposure data. As the results, the exposing mask which is called a reticle is formed. By utilizing this exposure mask, the device pattern is formed on a semiconductor wafer by a step and repeat method. In the future, when a fining is further advanced, it is proposed that the device pattern is drawn directly on the semiconductor wafer by an electronic beams exposure according to the exposure data. Furthermore, in a conventional versatile device, a mask substrate is formed from the reticle by the step and repeat method, and the mask substrate was closely adhered to the semiconductor wafer to expose.
In this manner, in the case where the mask pattern or device pattern (generically referred to as a plate pattern) is formed from the exposure data, a pattern inspection is necessary as to whether or not the formed plate pattern agrees with a predetermined pattern of the exposure data. In the case where the plate pattern formed in the exposing, developing, and etching steps disagrees with a pattern of the exposure data designed in the first place, it is detected as defects.
Incidentally, generically, the inspection of the plate pattern is effected with respect to the pattern formed by etching an underlayer by utilizing the resist pattern obtained by the exposure and development. However, it is possible to also effect the pattern inspection with respect to the resist pattern at a stage in which the resist is exposed and developed. Accordingly, both the plate pattern formed by the exposure, development, and etching, and the plate pattern of the resist formed by the exposure and development are objects of the plate pattern inspection of this specification. However, in the below description, the method for inspecting the plate patter which has been exposed, developed, and etched will be described as an example.
In the above pattern inspection process, in the case where an extraction pattern (slit) or a remaining pattern (fine pattern) exceeding a resolution limit in forming the plate pattern occurs in the pattern by the exposure data, a disagreement between the plate pattern after the exposing, developing, and etching steps and the pattern by the exposure data occurs. In other words, the extraction pattern (slit) or remaining pattern (fine pattern) exceeding a resolution limit vanishes from the plate pattern, and is detected as defects in the pattern inspection process. As such the extraction pattern or remaining pattern exceeding a resolution limit is not expected to be formed positively, even if such the disagreement occurs in the pattern inspection process, it is not necessary to deem such disagreement as the actual defects. However, when the plate pattern is simply compared with the pattern of the exposure data, it is detected as the defects. Then, the defects that are not required to be deemed as defects are referred to as pseudo defects.
The pseudo defects as described above were detected even in a conventional LSI manufacturing process, and do not cause any drawbacks in functions and characteristics of the device. In the case, it is confirmed whether or not the detected defective patterns are the pseudo defects, or the number of pseudo defects is reduced by dropping a defect detection sensitivity within an allowable range of a detection threshold of the defective patterns to be intrinsically detected.
However, in recent years, in the VLSI or large-sized flat display, the amount of patterns of the plate patterns reaches an enormous number, and therefore when the defective patterns detected in the patterns inspecting process are confirmed whether or not they are the above pseudo defects, such confirmation needs an enormous number of steps. Furthermore, according to the progress of fining the device, the fining patterns (extraction patterns or remaining patterns) which are unlimitedly close to a resolution limit are contained, and a difference between such the fining patterns and the fining patterns exceeding the resolution limit corresponding to the pseudo defects is lessened. As the results, when defects detection sensitivity is dropped, even the defective patterns to be intrinsically detected cannot be defected, and it becomes difficult to decrease the number of pseudo defects in a conventional method.
The fining patterns detected as the pseudo defects are formed due to various reasons. For example, they are accidentally formed in a layout design, and as the designer expects that they disappear in the developing step, they are left behind in some cases. Furthermore, a pattern processing is performed in order to eliminate fine slits which are the extraction patterns. As the results, inversely, fining patterns are newly formed in some pattern cases. Alternatively, according to the fining in recent years, in the case where correction patterns for an optical pattern correction are added to layout patterns, taking into account proximity exposure effects in the exposing step, these added correction patterns act as a cause of the pseudo defects in some cases.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a plate pattern forming method and its inspection method in which the number of pseudo defects can be decreased from among pattern disagreements occurring between patterns by exposure data and plate patterns after being exposed and developed based thereon.
It is another object of the present invention to provide a plate pattern forming method and its inspection method, capable of eliminating unnecessary fining patterns from the patterns by exposure data.
In order to attain the aforesaid objects, according to a first aspect of the present invention, provided is a method of inspecting plate patterns which are formed by exposure and development by use of exposure data patterns having a plurality of patterns, the method comprising: a fine pattern removal process operation on a plurality of patterns included in the exposure data patterns, including a logical sum process to change a plurality of overlaid patterns into a sole pattern; a minus-sizing process to fine a side of the patterns in a first width; and a plus-sizing process to thicken the side of the patterns in the first width, thereby forming a reference data pattern. This fine pattern removal process can remove the fine patterns causing pseudo defects included in the exposure data patterns. In the following pattern inspect process, the plate pattern is compared with the reference data pattern, and the disagreement between both of the patterns is detected as a defective pattern. As the fine patterns causing the pseudo defect

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