Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Reexamination Certificate
2000-09-19
2002-07-30
Paladini, Albert W. (Department: 2841)
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
C361S800000, C361S816000, C439S088000, C439S126000
Reexamination Certificate
active
06426468
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a circuit board, more precisely to a circuit board comprising a substrate, which includes: a first face (Top Layer) on which conductor patterns, which will be connected to a semiconductor chip, are formed; a second face (Bottom Layer) on which a plurality of pads, on which terminals are formed; and plated through holes whose inner faces are coated with plating layers so as to electrically connect the conductor patterns with the pads.
In conventional circuit boards (a circuit board whose both faces are covered with copper layers, a multilayer circuit board, a plastic ball grid array, a chip size package, etc.), conductor patterns are formed on the substrate in zigzag shapes.
For example, the conductor patterns on both faces of the plastic ball grid array are shown in
FIGS. 9 and 10
. In
FIG. 9
, a die-pad
52
on which a semiconductor chip will be mounted is formed on an upper face of a substrate
51
. A ground plane is formed in the die-pad
52
by nickel and gold plating, or the die-pad
52
is plated with copper, nickel and gold plating and partially coated with solder mask. Power plane
53
, which are formed by nickel and gold plating, are provided to enclose the die-pad
52
. Conductor patterns
57
include: signal lines connecting a plurality of lands
56
, which are provided close to plated through holes
55
in outer edge sections of the substrate
51
, with a plurality of connecting sections
54
, to which inner leads of the semiconductor chip are connected; and ground plane. The conductor patterns
57
are formed into the zigzag shapes. The connecting sections
54
of the conductor patterns
57
are plated with nickel and gold plating.
Slot holes
58
are formed around each circuit board unit, so that the circuit board units can be separated one by one. The die-pad
52
has patterns
59
for tightly sticking the semiconductor chip and thermal holes
60
for dissipating heat of the semiconductor chip.
The plated through holes
55
are bored in a plastic substrate
51
, whose thickness is about 400 &mgr;m, by a drill bit, whose diameter is about 300 &mgr;m. So diameter of the lands
56
should be 500 to 600 &mgr;m. If the drill bit diameter is 200 or 250 &mgr;m and is used to bore the plated through holes
55
, the drill is apt to break and drilling time could be longer. In order to use the limited area as efficiently with a large number of the conductor patterns by conventional technologies which are mentioned herein above, the conductor patterns
57
must be formed into the zigzag patterns.
As shown in
FIG. 10
, each plated through hole
55
is opened in a bottom face of the substrate
51
as well as the upper face thereof. Conductor patterns
62
are extended from lands
61
, which are provided around the plated through holes
55
, toward the center of the substrate
51
. There is formed a pad
63
, on which a solder ball I/O terminal will be formed, at an inner end of each conductor pattern
62
. The conductor patterns
62
are also formed into the zigzag shapes so as to make the conductor patterns shorter and form a large number of the conductor patterns in a limited area.
A copper layer is formed on a bottom face of the die-pad
52
by etching, and a heat sink
64
is fixed thereon to highly dissipate the heat of the semiconductor chip. To improve electric performance, there is formed a broad shield pattern
65
between the heat sink
64
and a pattern area in which the pads
63
are formed.
These days, processing speed of central processing units of computers are higher and higher. Thus, peripheral devices, for example, a graphic controller, a memory controller, are also required to operate at higher speed so as to synchronize with operating frequency of the high speed central processing unit.
The high speed central processing units whose operating frequency is more than 200 MHz have been used, and those whose operating frequency is more than 500 MHz are being studied now. So the electric performance of the circuit boards must be improved.
As shown in
FIGS. 9 and 10
, the conductor patterns
57
are extended from the connecting sections
54
, which are close to the die-pad
52
, to the plated through holes
55
, which are located in the outer edge sections of the substrate
51
; the conductor patterns
62
are extended from the plated through holes
55
, which are located in the outer edge sections of the substrate
51
, to the pads
63
, which are located at inner parts of the substrate
51
. The conductor patterns
57
and
62
are connected by the plated through holes
55
. Further, the conductor patterns
57
and
62
are formed into the zigzag shapes, resulting in longer conductor length. Due to the longer length, it is difficult to adjust impedance between devices and the impedance characteristics of signal lines deteriorate.
In addition, a proper electromagnetic field cannot be generated, and high speed signal processing is limited.
Plating bars
66
, which are formed on the lands
56
of the conductor patterns
57
, and plating bar
67
of the die-pad
52
act as antennas and receive noises.
Since the diameter of the plated through holes
55
are limited, density of the conductor patterns on the substrate
51
is limited, and layout thereof is also limited. Furthermore, the number of the conductor patterns is limited in the limited area, so that the high speed signal processing is limited.
With the high speed signal processing, the exothermic value of the semiconductor chip must be increased. If the exothermic value is too great, the semiconductor chip will be damaged due to thermal yield. To avoid the thermal yield and thermal stress of the semiconductor chip, heat diffusivity of the circuit board must be increased.
These days, the semiconductor chip is driven by lower voltage, so threshold voltage is also set lower. Since the semiconductor chip is apt to be influenced by noises, which are generated in the circuit board or external devices, the characteristics of the lower threshold voltage semiconductor chip must be protected.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a circuit board in which the length of the conductor patterns can be shorter.
Another object of the present invention is to provide a circuit board, which is capable of improving the electric performance for the high speed signal processing.
To achieve the object, the circuit board of the present invention, which comprises a substrate, is characterized in, that the substrate includes: a first face on which conductor patterns, which will be connected to a semiconductor chip, are formed; a second face on which a plurality of pads, on which terminals are formed, are matrically formed; and plated through holes whose one ends are respectively opened in the conductor patterns and the other ends are respectively opened in the pads, wherein inner faces of the plated through holes are coated with plating layers so as to respectively electrically connect the conductor patterns with the pads.
In the circuit board, the one ends of the plated through holes which connect the conductor patterns for clock signals with the corresponding pads may be opened in a connecting section of the conductor patterns to which inner leads of the semiconductor chip will be connected.
In the circuit board, the conductor patterns for the clock signals may be located close to the conductor pattern for shielding, which is connected to a ground plane.
In the circuit board, the conductor patterns may linearly connect connecting sections, to which the semiconductor chip is connected, with the one ends of the plated through holes.
In the circuit board, each pad may be enclosed by a metallic shield pattern.
In the circuit board, the conductor patterns may be enclosed by a metallic shield pattern, each pad may be enclosed by second metallic shield patterns and may be connected by a third metallic pattern, which is formed on a side face of the substrate.
In the circuit board, the terminals may be solder balls on the pads.
In the presen
Tanaka Tadahisa
Utsunomiya Hisanobu
Birch & Stewart Kolasch & Birch, LLP
Kabushiki Kaisha Eastern
Paladini Albert W.
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