Method for driving plasma display panel

Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C345S067000, C345S068000

Reexamination Certificate

active

06380912

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for driving a plasma display panel and, more particularly, to a method for driving a three-electrode surface-discharge alternating-current plasma display panel.
2. Description of the Related Art
FIG. 1
shows an electrode line pattern of a general three-electrode surface-discharge alternating-current plasma display panel,
FIG. 2
shows a cell forming a pixel of the plasma display panel shown in
FIG. 1
, and
FIG. 3
shows another example of a pixel of the panel shown in FIG.
1
. Referring to the drawings, in a general three-electrode surface-discharge alternating-current plasma display panel, address electrode lines A
1
, A
2
, A
3
, . . . , A
m−2
, A
m−1
and A
m
, a dielectric layer
11
(and/or
141
of FIG.
3
), scan electrode lines Y
1
, Y
2
, . . . , Y
n−1
and Y
n
, common electrode lines X
1
, X
2
, . . . , X
n−1
and X
n
and a MgO protective film
12
are provided between front and rear glass substrates
10
and
13
of a general surface-discharge plasma display panel
1
.
The address electrode lines A
1
, A
2
, A
3
, . . . , A
m−2
, A
m−1
and A
m
, coat the entire surface of the rear glas substrate
13
in a predetermined pattern. Phosphors (
142
of
FIG. 3
) may coat the entire surface of the scan electrode lines Y
1
, Y
2
, . . . , Y
n−1
and Y
n
. Otherwise, the phosphors
142
may coat the dielectric layer
141
in the event the dielectric layer is coated over the entire surface of the scan electrode lines Y
1
, Y
2
, . . . , Y
n−1
and Y
n
in a predetermined pattern.
The common electrode lines X
1
, X
2
, . . . , X
n−1
and X
n
and the scan electrode lines Y
1
, Y
2
, . . . , Y
n−1
and Y
n
are arranged on the rear surface of the front glass substrate
10
, orthogonal to the address electrode lines A
1
, A
2
, A
3
, . . . , A
m−2
, A
m−1
and A
m
in a predetermined pattern. The respective intersections define corresponding pixels. The common electrode lines X
1
, X
2
, . . . , X
n−1
and X
n
and the scan electrode lines Y
1
, Y
2
, . . . , Y
n−1
and Y
n
each comprise indium tin oxide (ITO) electrode lines X
na
and Y
na
, and metal bus electrode lines X
nb
and Y
nb
, as shown in FIG.
3
. The dielectric layer
11
entirely coats the rear surface of the common electrode lines X
1
, X
2
, . . . , X
n−1
and X
n
and the scan electrode lines Y
1
, Y
2
, . . . , Y
n−1
and Y
n
. The MgO protective film
12
for protecting the panel
1
against strong electrical fields entirely coats the rear surface of the dielectric layer
11
. A gas for forming a plasma is hermetically sealed in a discharge space.
The driving method generally adopted for the plasma display panel described above is an address/display separation driving method in which a reset step, an address step and a sustain discharge step are sequentially performed in a unit sub-field. In the reset step, wall charges remaining in the previous sub-field are erased. In the address step, the wall charges are formed in a selected pixel area. Also, in the sustain discharge step, light is produced at the pixel at which the wall charges are formed in the address step. In other words, if alternating pulses of a relatively high voltage are applied between the common electrode lines X
1
, X
2
, . . . , X
n−1
and X
n
and the scan electrode lines Y
1
, Y
2
, . . . , Y
n−1
and Y
n
, a surface discharge occurs at the pixel at which the wall charges are formed. Here, a plasma is formed in the gas layer of the discharge space
14
and the phosphors
142
are excited by ultraviolet rays to thus emit light.
Here, several unit sub-fields basically operating on the principles as described above are contained in a unit frame, thereby achieving a desired gray scale display by sustain discharge time intervals of the respective sub-fields.
In the sustain discharge step of the above-described method for driving the plasma display panel
1
, conventionally, the timing of alternating pulses applied to all scan electrode lines Y
1
, Y
2
, . . . , Y
n−1
and Y
n
, are constant, and the timings of alternating pulses applied to all common electrode lines X
1
, X
2
, . . . , X
n−1
and X
n
is also constant.
Accordingly, since the overall driving current flowing at the timing at which alternating pulses are applied to all scan electrode lines Y
1
, Y
2
, . . . , Y
n−1
and Y
n
, or all common electrode lines X
1
, X
2
, . . . , X
n−1
and X
n
become considerably large, an apparatus for preventing electrical shock to the plasma display panel
1
and the driving apparatus (not shown) are further necessary. Also, electromagnetic interference increases.
SUMMARY OF THE INVENTION
To solve the above problem, it is an objective of the present invention to provide a method for driving a plasma display panel which can reduce electromagnetic interference without applying an electrical shock to a plasma display panel and a driving apparatus therefor.
Accordingly, to achieve the above objective, there is provided a method for driving a plasma display panel in which a reset step of erasing remaining wall charges from a previous sub-field, an address step of forming wall charges in a selected pixel area, and a sustain discharge step of generating light from pixels where the wall charges are generated in the address step by applying alternating pulses to scan electrode lines and common electrode lines arranged parallel to each other, are sequentially performed in a unit sub-field the method including the steps of allocating the scan electrode lines and the common electrode lines into a plurality of groups, and applying the alternating pulses to the scan electrode lines and common electrode lines allocated into each group in the address step.
In the sustain discharge step, the alternating pulses are preferably applied to the respective scan electrode lines and a common scan electrode which is not adjacent to the respective scan electrode lines at the same timing.
Therefore, since the amount of overall driving current flowing at a the timing at which alternating pulses are applied to all scan electrode lines Y
1
, Y
2
, . . . , Y
n−1
and Y
n
, or all common electrode lines X
1
, X
2
, . . . , X
n−1
and X
n
become considerably reduced, electrical shock to the plasma display panel and a driving apparatus therefor can be prevented and electromagnetic interference can be reduced.


REFERENCES:
patent: 5331252 (1994-07-01), Kim
patent: 5670974 (1997-09-01), Ohba et al.
patent: 6097358 (2000-08-01), Hirakawa et al.
patent: 6144349 (2000-11-01), Awata et al.
patent: 6262699 (2001-07-01), Suzuki et al.
patent: 6288693 (2001-09-01), Song et al.
patent: 6326736 (2001-12-01), Kang et al.
patent: 8-152865 (1996-06-01), None

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method for driving plasma display panel does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for driving plasma display panel, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for driving plasma display panel will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2908393

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.