Metal working – Method of mechanical manufacture – Electrical device making
Reexamination Certificate
2000-12-01
2002-05-21
Arbes, Carl J. (Department: 3729)
Metal working
Method of mechanical manufacture
Electrical device making
C029S825000, C029S832000, C029S840000
Reexamination Certificate
active
06389686
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a process for fabricating a thin multi-layer circuit board on which can be mounted many electronic parts .such as integrated circuits (ICs) and large size integrated circuits (LSIs).
2. Related Art
There has been known a thin multi-layer circuit board which is obtained by forming an insulating layer on a plate-like substrate made of a suitable insulating material and interposing at least two wiring pattern layers in this insulating layer. The two wiring pattern layers are connected to each other at a suitable place through a via and the two wiring pattern layers constitute a predetermined circuit pattern. Moreover, on the surface of the thin multi-layer circuit board are provided electronic part-mounting pads to which can be connected the leads of electronic parts, the electronic part-mounting pads being connected through vias to the wiring pattern layers in the insulating layer.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a thin multi-layer circuit board which is so constituted that, when a remodeling pad is being used, this remodeling pad can be easily cut, and a process for fabricating the same.
Another object of the present invention is to provide a process for fabricating a thin multi-layer circuit board, which does not require a process for etching gold plating at the time of forming a pad by plating gold on the thin multi-layer circuit board.
A further object of the present invention is to provide a process for fabricating a thin multi-layer circuit board which is capable of forming a thin chromium film on the wiring pattern layers without relying upon the lift-off method when a number of wiring pattern layers are stacked on an insulating plate-like substrate.
A still further object of the present invention is to provide a process for fabricating a thin multi-layer circuit board which is capable of removing a defective wiring pattern layer without damaging the wiring pattern layers on the lower side when a number of wiring patterns are stacked on an insulating plate-like substrate.
A yet further object of the present invention is to provide a method of pre-baking a photosensitive polyimide resin layer that is applied in the fabrication of a multi-layer circuit board, the pre-baking method making it possible not only to uniformly heat the insulating plate-like substrate from the back side thereof but also to carry out the operation with excellent efficiency, as well as to provide a heat-accumulating block used for the method of pre-baking.
According to a first aspect of the present invention, there is provided a process for fabricating thin multi-layer circuit boards by alternately stacking wiring pattern layers and insulating layers on an insulating plate-like substrate, and electrically connecting said wiring pattern layers through vias in said insulating layers in order to construct a predetermined circuit pattern using said wiring pattern layers, wherein a barrier metal exclusion zone is prepared by forming a metallic barrier layer on said wiring pattern layer in an electronic part-mounting region, a remodeling pad layer is formed on said metallic barrier layer neighboring said barrier metal exclusion zone, and an electronic part-mounting pad layer is formed neighboring said remodeling pad layer.
According to the first aspect of the present invention, furthermore, there is provided a thin multi-layer circuit board which is obtained by alternately stacking wiring pattern layers and insulating layers on an insulating plate-like substrate, and electrically interconnecting said wiring pattern layers through vias in said insulating layers in order to i.e. construct a predetermined circuit pattern by said wiring pattern layers, wherein a metallic barrier layer is formed on the wiring pattern layer in an electronic part-mounting region, a barrier metal exclusion zone is included in said metallic barrier layer, and a remodeling pad layer and an electronic part-mounting pad layer are formed on said metallic barrier layer, said remodeling pad layer being arranged in a location neighboring said barrier metal exclusion zone and said electronic part-mounting pad layer being arranged in a location neighboring said remodeling pad layer.
In the process for fabrication of the thin multi-layer circuit board according to the first aspect of the present invention as described above, the barrier metal exclusion zone is prepared in a location neighboring the remodeling pad layer. In using the remodeling pad, therefore, the wiring pattern layer is cut by a YAG laser along the barrier metal exclusion zone in order to cut the electrical connection between the remodeling pad and the wiring pattern layer. Therefore, destruction of the insulating layer in the thin multi-layer circuit board is minimized. Moreover, the barrier metal is formed of a sufficient thickness making it possible to prevent the barrier metal from being corroded at the time of soldering lead wires onto the electronic part-mounting pad and onto the remodeling pad.
According to a second aspect of the present invention, there is provided a process for fabricating thin multi-layer circuit boards by alternately stacking wiring pattern layers and insulating layers on an insulating plate-like substrate, and electrically interconnecting said wiring pattern layers through vias in said insulating layers in order to constitute a predetermined circuit pattern by said wiring pattern layers, wherein a metallic barrier layer is formed on the wiring pattern layer in an electronic part-mounting region, a pad-forming resist is formed in said metallic barrier layer, a gold pad layer of a predetermined shape is formed on said metallic barrier layer by using said pad-forming resist, and said pad-forming resist is removed.
According to the second aspect of the present invention, there is provided a process for fabricating thin multi-layer circuit boards by alternately stacking wiring pattern layers and insulating layers on an insulating plate-like substrate, and electrically connecting said wiring pattern layers through vias in said insulating layers in order to constitute a predetermined circuit pattern by said wiring pattern layers, wherein a pad-forming resist is formed on the wiring pattern layer in an electronic part-mounting region, a metallic barrier layer is formed on the wiring pattern layer, a gold pad layer of a predetermined shape is formed on the metallic barrier layer using the pad-forming resist, and said pad-forming resist is removed.
In the process for fabrication according to the second aspect of the present invention, the gold pad layer is formed into a predetermined shape by using the pad-forming resist and without the need of using a highly toxic gold-etching solution, contributing to the safety of the operation.
According to a third aspect of the present invention, there is provided a process for fabricating thin multi-layer circuit boards by alternately stacking wiring pattern layers and insulating layers on an insulating plate-like substrate, and electrically connecting said wiring pattern layers through vias in said insulating layers in order to constitute a predetermined circuit pattern by said wiring pattern layers, wherein the wiring pattern layers are formed on the insulating layers by sequentially forming a first thin chromium film, a copper layer and a second thin chromium film on said insulating layers; followed by etching.
In the process for fabrication according to the third aspect of the present invention, the wiring pattern layers on the insulating layers are formed by sequentially forming the first thin chromium film, the copper layer and the second thin chromium film on the insulating layers followed by etching. Therefore, there is no need for employing a lift-off method for forming the second thin chromium film on the insulating layers.
According to a fourth aspect of the present invention, there is provided a process for fabricating thin multi-layer circuit boards by alternately stacking wi
Iida Kenji
Katayama Hiroyuki
Katsube Toshiro
Kurokawa Yasunaga
Nakano Kazuo
Arbes Carl J.
Fujitsu Limited
Staas & Halsey , LLP
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