Static information storage and retrieval – Powering – Conservation of power
Reexamination Certificate
2000-09-29
2002-06-04
Nguyen, Viet Q. (Department: 2818)
Static information storage and retrieval
Powering
Conservation of power
C365S189011, C365S228000
Reexamination Certificate
active
06400633
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates generally to electrically erasable and programmable non-volatile memories. More particularly, this invention relates to a method and system that provide a power-saving function for flash memory devices.
Electronic systems typically include processors and memory. The memory is used to store instructions and data. In some systems, such as cellular phones, non-volatile memory is needed to ensure that the stored data is not lost even when the system is turned off. One non-volatile memory family is Read Only Memory (ROM), Programmable ROM (PROM), and Erasable-Programmable ROM (EPROM), with varying degrees of flexibility of use. ROM memories have high density, low power consumption, and high performance, but they are not in-system updateable. On the other hand is the volatile memory family of Random Access Memory (RAM), Dynamic RAM (DRAM), and battery-backed Static RAM (SRAM). The RAM family, however, is in-system updateable and has high performance, but it is volatile. DRAM stores temporary data, and SRAM integrates a battery to retain stored data when system power is removed. SRAM is considerably more expensive than DRAM. Electrically-Erasable-Programmable ROM (EEPROM) is a special kind of ROM that is in-system modifiable on a byte-by-byte basis, like RAM, but it is also non-volatile, like ROM.
Flash memory is one type of inherently nonvolatile memory, with no refresh or battery requirements, which can be erased or programmed in units of memory called blocks. It is a variation of EEPROM which, unlike flash memory, is erased and rewritten at the byte level, which is slower than flash memory updating. Flash memory is often used to hold control code such as BIOS in personal computer. When BIOS needs to be changed, the flash memory can be updated in block (rather than byte) sizes, making it easy to update. Flash memory is used in digital cellular phones, digital cameras, LAN switches, PC cards for notebook computers, digital set-up boxes, embedded controllers, and other devices. Flash memory is in-system updateable. Its simpler cell architecture (only one transistor) gives it significant density advantages over both EEPROM and SRAM, and compares favorably with densities achieved by ROM and DRAM on analogous manufacturing processes. Finally, flash memory is the only approach to satisfy the desired characteristics of nonvolatility, upgradeability, high density, and low cost.
One problem with prior flash memories is that they suffer from extraneous power consumption during a memory read. During a memory read, to update the output bus of the memory unit with a new memory data, a number of output bits have to be toggled. Each toggling of the output bits, however, consumes considerable power because there is a capacitance associated with the output of the memory device that dissipates considerable amount of charge for each toggling of the output bits. There is a need, therefore, for reducing the number of output bits that need to be toggled, and thus providing a power saving-mode for synchronous reading of memory data.
BRIEF SUMMARY
The present invention is defined by the following claims, and nothing in this section should be taken as a limitation on those claims. By way of introduction, in one embodiment, once a new memory content is read from the memory, before being put at the memory output bus, it is compared with the previously read memory content which is currently on the output bus of the memory device. If the result of the comparison indicates that more than a predetermined number of the output bits have to be toggled in order to put the new memory content on the memory output bus, the new data is internally inverted to reduce the number of toggles at the output bus. The memory device then sends a signal to a state machine/controller indicating that the new data has been internally inverted, and that the inverted data has to be inverted back before being put on the memory output bus.
Additional aspects, features and advantages of the present invention will become apparent from the following description of its preferred embodiments, which description should be taken in conjunction with the accompanying drawings.
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patent: 5829026 (1998-10-01), Leung et al.
patent: 5896335 (1999-04-01), Myers et al.
patent: 6052302 (2000-04-01), Moyer et al.
patent: 6151667 (2000-11-01), Walters
Akaogi Takao
Al-Shamma Ali
Cleveland Lee
Advanced Micro Devices , Inc.
Nguyen Viet Q.
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