Electrical pulse counters – pulse dividers – or shift registers: c – Shift register – Shift direction control
Reexamination Certificate
2001-04-13
2002-04-30
Wambach, Margaret R. (Department: 2816)
Electrical pulse counters, pulse dividers, or shift registers: c
Shift register
Shift direction control
C377S072000, C377S075000
Reexamination Certificate
active
06381295
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to a shifter that can detect overflow conditions in a speedy manner.
2. Background Art
Conventional shifters can be used in a number of different applications. One common application is digital signal processing (DSP), which is commonly used in video conferencing. In performing DSP, analog data (e.g., representing speech) is converted to digital data. During this conversion, an algorithm is usually applied to perform data compression, and a shifter is normally used in this compression algorithm.
Conventional shifters operate by performing left-shift and right-shift operations. Referring to
FIG. 1
, the sign bit of the shifted value is usually contained in the left-most bit or location of a shift register where the shifting is performed. During a right-shift operation, the sign bit still exists. However, during a left-shift operation, the sign bit is shifted away. As a result, during left-shift operations, it is not possible to determine whether the sign bit has changed. Unfortunately, the status of the sign bit is important in detecting the occurrence of overflow, since overflow occurs either when the sign bit has been shifted away, or when the sign bit has changed. Thus, conventional shifters were not fully capable of detecting overflow conditions, and of performing optimal saturation operations. As used herein, saturation means that when overflow occurs, the result is set to the most-positive or most-negative values depending on the direction of overflow.
To overcome this shortcoming, efforts were made to detect overflow by using multiplication and accumulation operations, since the multiply and accumulate operations have an overflow flag reporting mechanism. Unfortunately, the multiply and accumulate operations require significantly more processing time, which will slow down the shifting operation and reduce the performance of the system. For example, to left shift a 32-bit value by n bits using a multiplier and adder will require eight instructions to perform a single left shift with overflow detection and saturate the result. On the other hand, a left shift performed by a conventional 32-bit shifter will only require two instructions.
Thus, there still remains a need for a shifter that can detect overflow conditions and perform saturation operations in a speedy manner while avoiding the problems experienced by known shifters.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a shifter that can speed up the shifting operation while being able to effectively detect overflow conditions.
It is another object of the present invention to provide a shifter that can effectively perform saturation operations upon the detection of an overflow condition.
To accomplish the objectives of the present invention, there is provided an apparatus for performing a left shift operation that includes a shifter unit that contains the value to be shifted, a flag having an input coupled to the left-most bit of the shifter unit for receiving sign bit information for the value to be shifted, an overflow detector having inputs coupled to the shifter unit and the flag for determining the existence of an overflow condition, and a shift counter having outputs coupled to the shifter unit and the overflow detector.
According to one embodiment of the present invention, the apparatus further includes a saturation circuit having inputs coupled to the flag and the overflow detector, and an output coupled to the shifter unit.
The present invention further provides a method of performing a left-shift operation, which includes
a. loading a value to be shifted into a shifter unit, the shifter unit having a first left-most bit containing sign bit information for the value to be shifted, and a second bit adjacent to the first bit;
b. shifting the value by one bit to the left;
c. comparing the data in the first and second bits; and
d. setting an overflow condition if the data in the first and second bits are not the same.
REFERENCES:
patent: 6058473 (2000-05-01), Guttag et al.
Sun Raymond
Wambach Margaret R.
Windbond Electronics Corp.
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