Method of making substrate injection logic operator structure

Details Method of making substrate injection logic operator structure Method of making substrate injection logic operator structure

1984-12-03

1985-11-05

Weisstuch, Aaron

Metal working

Method of mechanical manufacture

Assembling or joining

148 15, 148175, 148190, 29576B, 29576E, 29578, 357 92, H01L 2174

Patent

active

045504911

ABSTRACT:
An SFL operator and process for its manufacture. The operator is manufactured from a low-doped P-type substrate on which are successively implanted a highly-doped P-type layer and a highly-doped N-type layer. Below a metallic collector contact of the NPN transistor of the SFL operator, the structure successively comprises an epitaxial N-layer, an average-doped R-type layer and a highly-doped N-type layer. This structure is compatible with the manufacturing on the same silicon chip of both SFL operators and classical linear bipolar transistors.

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