Electricity: motive power systems – Switched reluctance motor commutation control
Reexamination Certificate
2001-03-15
2002-04-30
Nappi, Robert E. (Department: 2837)
Electricity: motive power systems
Switched reluctance motor commutation control
C318S434000, C318S132000, C318S459000, C318S500000, C388S928100
Reexamination Certificate
active
06380703
ABSTRACT:
BACKGROUND OF INVENTION
1. Field of Invention
This invention relates to improvements in methods and circuits for driving DC brushless, polyphase motors, such as a spindle motor of a mass data storage device, or the like, and more particularly to improvements in such driving methods and circuits that at least reduce the acoustic noise in motors of this type, and to improvements in driving methods and circuits for driving such motors using digital circuitry for controlling the phase of the driving voltages to the spindle motor.
2. Relevant Background
This invention relates primarily to improvements in circuitry for use in controlling the spindle motor of mass data storage devices. Mass data storage devices include tape drives, as well as hard disk drives that have one or more spinning magnetic disks or platters onto which data is recorded for storage and subsequent retrieval. Hard disk drives may be used in many applications, including personal computers, set top boxes, video and television applications, audio applications, or some mix thereof. Many applications are still being developed. Applications for hard disk drives are increasing in number, and are expected to further increase in the future. Mass data storage devices may also include optical disks in which the optical properties of a spinning disk are locally varied to provide a reflectivity gradient that can be detected by a laser transducer head, or the like. Optical disks may be used, for example, to contain data, music, or other information.
Typically, mass data storage devices use polyphase, usually three-phase, DC motors to rotate the memory media. In the operation of such DC brushless, polyphase motors of the type to which the invention pertains, efficient motor drive requires that the excitation current applied to the motor phases be aligned with the bemf generated by individual phases. One of the best schemes for achieving this alignment is the use of a phase-locked loop (PLL), which adjusts the phase and frequency of the commutation, so that the bemf of the undriven winding passes through zero in the center of the appropriate commutation state. If there is a significant phase error, torque ripple occurs which results in an unevenness or jerkiness in the motor rotation, and which may also excite resonances in the motor causing undesirable acoustic noise.
To address this problem in the past, care has been taken to assure that a pure sine wave shaped excitation signal is applied to the motor. To provide for such sinusoidal waveforms, various segmented and concatenated waveforms have been proposed in the past. Nevertheless, it is still greatly desirable to reduce as much as possible the phase error of the driving signals.
Consequently, what is needed is a disk drive and method for operating it in which the noise associated with the drive in operation is reduced or eliminated. What is additionally needed is a disk drive and method that controls the drive signals in a way that the phase error thereof is minimized.
SUMMARY OF INVENTION
In light of the above, therefore, it is an object of the invention to provide an improved disk drive and method for operating it in which the noise associated with the drive in operation is reduced or eliminated.
It is another object of the invention to provide a method and circuit for controlling the phase error of a polyphase dc motor.
It is another object of the invention to provide a mass data storage device containing the circuit for controlling the phase error of a polyphase dc motor.
These and other objects, features, and advantages will become apparent to those skilled in the art, when the following detailed description is read in conjunction with the accompanying drawings and appended claims.
According to a broad aspect of the invention, a circuit is presented for providing commutation control signals to a commutator for a polyphase brushless dc motor in a mass data storage device. The circuit includes an accumulator to accumulate a digital count that is proportional or related to a phase difference between the commutation control signals and a motor bemf; and a digital variable frequency oscillator to generate an oscillator output signal of frequency proportional or related to the digital count to reset the accumulator after a predetermined time determined by the frequency. The circuit may also include a digital filter between the digital accumulator and the digital variable frequency oscillator to generate a magnitude signal of magnitude proportional or related to the count for delivery to the variable frequency oscillator to control the frequency thereof.
According to another broad aspect of the invention, a circuit is presented for providing commutation control signals to commutator for a polyphase brushless dc motor in a mass data storage device. The circuit includes means for accumulating a digital count that is proportional or related to a phase difference between the commutation control signals and a motor bemf; and means for generating an oscillator output signal of frequency proportional or related to the phase difference to reset the means for accumulating after a predetermined time determined by the frequency. Means for digitally filtering the output signal may be provided to generate a magnitude signal of magnitude proportional or related to the count for delivery to the means for generating an oscillator output signal to control the frequency thereof.
According to still another broad aspect of the invention, a method is presented for providing commutation control signals to a commutator for a polyphase brushless dc motor in a mass data storage device. The method includes accumulating a digital count that is proportional or related to a phase difference between the commutation control signals and a motor bemf; and generating an oscillator output signal of frequency proportional or related to the digital count to reset the accumulator after a predetermined time determined by the frequency.
According to yet another broad aspect of the invention, a method is presented for controlling a commutation timing of a polyphase dc motor. The method includes accumulating a digital count representing a difference between a bemf voltage of the motor and a reference signal, using the accumulated digital count to generate a digital feedback word for accumulation during a subsequent accumulation window with a previously accumulated value; and using the accumulated digital count to also control a frequency of a periodically reoccurring reference signal to provide the reference signal, to determine the accumulation window, and to control the commutation timing.
According to still another broad aspect of the invention, a method is presented for controlling a commutation timing of a polyphase dc motor. The method includes determining if a phase detection window has begun. If a phase detection window has begun, a register is loaded with a first increment value. Thereafter, the method includes determining if the phase detection window has ended. If the phase detection window has not ended, an increment value is continually added to an accumulation register. If the phase detection window has ended, a value in the accumulation register is integrated in an integrating accumulator and stored in a register to establish a reference frequency and to establish when the phase detection window has begun and ended.
According to still yet another broad aspect of the invention, a mass data storage device is presented. The mass data storage device includes a circuit for providing commutation control signals to a commutator for a polyphase brushless dc motor in a mass data storage device. The circuit includes an accumulator to accumulate a digital count that is proportional or related to a phase difference between the commutation control signals and a motor bemf; and a digital variable frequency oscillator to generate an oscillator output signal of frequency proportional or related to the digital count to reset the accumulator after a predetermined time determined by the frequency. The circuit may also
Brady W. James
Duda Rina I.
Nappi Robert E.
Swayze, Jr. W. Daniel
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