Voltage-controlled oscillator

Oscillators – Ring oscillators

Reexamination Certificate

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Details

C331S034000, C331S17700V, C327S280000

Reexamination Certificate

active

06452458

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a voltage-controlled oscillator and, particularly, to a voltage-controlled oscillator having a ring oscillator, which is constituted with a plurality of differential amplifiers each having a load circuit.
2. Description of the Related Art
In a recent phase-locked loop (PLL) for a disk servo system of CD-ROM, etc., an output frequency range thereof, which is up to several to ten times a reference oscillation frequency of the PLL, is required. It has been known that the PLL includes a voltage-controlled oscillator whose output frequency is varied correspondingly to an input voltage thereto.
Since the recent PLL has an on-chip structure due to the recent tendency of increase of the scale of integrated circuit and the operation speed thereof, the voltage-controlled oscillator of such PLL should have a structure suitable to be integrated on a chip. That is, it has been required to develop a voltage-controlled oscillator, which is stable regardless of variation of fabrication process, does not require regulation after fabrication and is durable against noise generated in an integrated circuit.
In order to realize such voltage-controlled oscillator, a ring oscillator composed of a plurality of differential amplifiers each having a load, by which the ability of the ring oscillator can be controlled, has been proposed in, for example, IEEE Journal of Solid-State Circuits, Vol. 25, No. 6, November, 1990, pp. 1385 to 1394, IEEE Journal of Solid-State Circuits, Vol. 27, No. 11, November, 1992, pp. 1599 to 1607 and U.S. Pat. No. 5,412,349. The ring oscillator, proposed in each of these articles has characteristics suitable to be integrated on a chip, since the ring oscillator is composed of the differential amplifiers whose sensitivity to power source noise is low, the operating point variation between sampled operating points is small due to simultaneous feedback control of the operating points and the operating point variation due to relative variation within a chip can be made small because an input impedance of the load is low.
These prior arts will be described in more detail with reference to
FIGS. 13
to
18
. The prior art voltage-controlled oscillator is shown in FIG.
13
. In
FIG. 13
, the voltage-controlled oscillator
103
comprises a ring oscillator
101
and a ring oscillator control circuit
102
for controlling an operation of the ring oscillator.
FIG. 14
is a block circuit diagram of the ring oscillator
101
, which is constructed with differential amplifiers
105
to
108
having identical circuit constructions. Each differential amplifier includes a plus input I
1
, a minus input I
2
, a plus output O
1
, a minus output O
2
, a current control voltage terminal IC and a load control voltage terminal CL. The differential amplifiers
105
to
108
are connected in series and an output of the differential amplifier
108
is fed back in reverse phase to an input of the differential amplifier
105
to constitute a 4-stage ring oscillator
104
. Since the ring oscillator
104
is composed of the differential amplifiers
105
to
108
, the sensitivity thereof to power source noise is restricted due to its high ability of removing the power source voltage variation. The current control voltage terminal IC of each differential amplifier has a function of controlling a circuit current thereof and the load control voltage terminal CL thereof has a function of controlling an in-phase output voltage such that the in-phase output voltage is always equal to the reference voltage shown in
FIG. 13
by regulating the performance of the load of the differential amplifier.
FIG. 15
is a circuit diagram of the ring oscillator control circuit
102
shown in FIG.
13
. In
FIG. 15
, an NMOSFET
111
has a gate connected to an oscillation frequency control voltage terminal, which is an input terminal of the voltage-controlled oscillator
103
, a source connected to a resistor
110
and a drain connected to a drain of a PMOSFET
112
. The gate of the PMOSFET
112
is connected to the drain thereof and a source of the PMOSFET
112
is connected to a power source terminal
115
. A differential amplifier
113
has an identical construction to that of each of the differential amplifiers
105
to
108
, and input terminals I
1
and I
2
are commonly connected to the reference voltage terminal and output terminals O
1
and O
2
are commonly connected to a plus input terminal of a single-end operation amplifier
114
. An output terminal of the single-end operation amplifier
114
is connected to a load control voltage terminal CL of the differential amplifier
113
. The drain of the PMOSFET
112
is connected to a current control voltage terminal IC of the differential amplifier
113
. A minus input terminal of the operation amplifier
114
is connected to the reference voltage source. The operation amplifier
114
controls the voltage of the load control voltage terminal CL of the differential amplifier
113
such that the output voltage of the differential amplifier
113
becomes equal to the reference voltage. Since the differential amplifier
113
has the same construction as that of any of the differential amplifiers
105
to
108
, which constitute the ring oscillator
101
, and the circuit current and the load control voltage thereof are also the same as those of any one of the differential amplifiers
105
to
108
, its in-phase output voltage becomes equal to that of the differential amplifiers
105
to
108
.
FIG. 16
is a circuit diagram of one (
121
) of the identical differential amplifiers
105
to
108
and
113
. In
FIG. 16
, the differential amplifier
121
includes an input differential pair of NMOSFET's
124
and
125
and an NMOSFET
126
as a current source. Load circuits
122
and
123
have identical circuit constructions each shown in
FIG. 17
or
18
. The load circuit shown in
FIG. 17
is composed of an NMOSFET
132
having a gate supplied with a load control voltage and an NMOSFET
133
having a gate and a drain connected to the gate thereof. A terminal
131
is connected to one of the output terminals O
1
and O
2
shown in FIG.
16
. Since the gate of the NMOSFET
133
is connected to an output terminal
131
, an impedance looked from the terminal
131
of the NMOSFET
133
, that is, an output impedance, is in inverse proportion to a mutual conductance of the NMOSFET
133
and has a low value. Further, since the NMOSFET
132
having the gate supplied with the load control voltage operates in a saturation region, when the load control voltage is low and the following relation is established between the voltage Vo at the output terminal
131
and the load control voltage VCl:
VCL−Vth<Vo
where Vth is the threshold voltage of the NMOSFET
132
. Therefore, the output impedance of the load becomes very large. That is, the output impedance is represented by &Dgr;V/ &Dgr;i, a ratio of voltage change &Dgr;V to current change &Dgr;i. In the saturation region, since current i is substantially constant, &Dgr;i is very close to 0 and the output impedance becomes substantially infinite. However, in order to make the in-phase output voltage constant even when the operating current is changed, the NMOSFET
132
whose performance can be controlled by the load control voltage is indispensable. That is, it is impossible to control the in-phase output voltage by only the NMOSFET
133
since the in-phase output voltage is varied by the operating current. Consequently, it becomes possible by using both the NMOSFET's
132
and
133
to reduce the output impedance of the load to a low value and to make the in-phase output voltage constant.
The load circuit shown in
FIG. 18
includes, in addition to the NMOSFET's
132
and
133
shown in
FIG. 17
, an NMOSFET
134
having a gate supplied with the load control voltage and provided on the source side of the NMOSFET
133
. In the load circuit shown in
FIG. 17
, when the operating current is reduced and a substantial portion of the ope

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