Method for performing dynamic re-scheduling of fabrication...

Data processing: generic control systems or specific application – Specific application – apparatus or process – Product assembly or manufacturing

Reexamination Certificate

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C700S101000, C700S121000

Reexamination Certificate

active

06434443

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to dynamic scheduling of workflow for a manufacturing plant and more particularly to optimizing the automation of scheduling of work in a plant processing a product such as semiconductor wafers.
2. Description of Related Art
Liu, C.; Thongmee, S.; and Hepburn, P. “A Methodology for Improving On-Time Delivery and Load Leveling Starts” 1995 IEEE/Semi Advanced Semiconductor Manufacturing Conference, pp. 95-100 (1995) describes methods for simulation-based production scheduling and planning of Work-In-Process (WIP).
Murty, S. V.; Bienvenu, J. W. “Global Planning at Harris Semiconductor” 1995 International Symposium on Semiconductor Manufacturing, pp. 18-23 (1995) describes a requirements planning system for a semiconductor specific planning engine that scans the entire production pipeline.
Hoitomt, D. J.; Luh, P. B. “Scheduling a Batch Processing Facility” Proceedings of the 1992 IEEE International Conference of Robotics and Automation” Nice France, (1992) pp 1167-1172 describes scheduling in a batch processing facility such as a “heat treat oven” for processing non-identical parts concurrently (batch composition) and determining beginning times for individual batches (batch sequencing). In some cases, composition is determined by assigning parts to batches according to Earliest Due Date (EDD). It states that the solution to the Lagrangian relaxation dual problem is a lower bound on the cost of the optimal schedule; and if assumptions are relaxed the EDD rule becomes a heuristic for solving the batch composition problem and the same batch sequencing algorithm can be used for making a schedule. It was to be used for improving delivery times where bottlenecks exist in batch processing facilities.
U.S. Pat. No. 5,612,886 of Weng for “Method and System for Dynamic Dispatching in Semiconductor Manufacturing Plants” shows a method for dynamic dispatching in semiconductor plants.
U.S. Pat. No. 5,546,326 of Tai et al. for “Dynamic Dispatching Rule that Uses Long Term Due Date and Short Term Queue Time to Improve Delivery Performance” discloses a dynamic dispatching rule.
SUMMARY OF THE INVENTION
It is an object of this invention to provide a method for changing the Due_Date (DD) of Work-In-Process (WIP) while at the same time assuring that the flow rate of the production line (wafer output) is linear. Product Control (PC) only uses the Required_Date (RD) based on manufacturing experience (e.g. a target of 2 days/lot (L)) to make a proper, but not exactly rational linear wafer start.
Another object of this invention is to provide a method for performing the task of re-scheduling and follow only the Product Control (PC) original of the customer driven Master Production Schedule (MPS).
Still another object of this invention to transform the linear wafers start into linear wafer output performance to ensure customer's satisfaction on volume demanding.
A further object of this invention is to ensure the inline equipment in loading balance.
One more object of this invention is to meet the daily linear wafers output by demand (Designed Out) in conformance with the on time delivery orientation of customers.
In accordance with one aspect of this invention, a system and a method are provided for transforming a set of Linear Wafers Starts (LWS) into a set of Linear Wafers Out (LWO) to ensure customer satisfaction by meeting the product quantity (volume) demands made by customers.
In accordance with another aspect of this invention a system and a method are provided for ensuring balance of loading of inline equipment.
In accordance with another aspect of this invention a system and a method are provided for meeting the daily demand (Designed Out) Linear Wafers Out (LWO) by the on time delivery orientation of customers.
In accordance with this invention use is made of the Due_Date, the link with products, and theoretical process time to make an exact re-scheduling automatically to ensure a linear wafer output.
In accordance with this invention a method and/or system for performing dynamic re-scheduling of priorities of work-in-process in a fabrication plant for manufacturing of a product is provided. It reads a key stage report for the work-in-process and a master production schedule for the work-in-process from stored data. It generates a master production schedule report from the key stage report and the master production schedule following only Due_Date data for the work-in-process, and generates a work-in-process distribution matrix for integrating the master production schedule report with work-in-process quantity data within a deliverable cycle time; allocates selected lots from the work-in-process distribution matrix using a snake pattern method to allocate the selected lots from the matrix, and changes the due date for the selected lots of the work-in-process selected by the snake pattern method. It generates a final re-scheduling table for the work-in-process including the selected lots, where

X
=
1
,
Y
=
1
X
=
n
,
Y
=
3

MPSR

(
Due


Date



(
X
)
,
CT

(
Y
)
)
=
Designed



Out
CT=Cycle Time
X=1, 2, 3 . . . m
Y=1, 2, 3 . . . p
where m and p are positive integers,
It uses the Due_Date data in allocating the selected lots. The method/system uses a link with products in allocating the selected lots and uses theoretical process time to make an exact re-scheduling automatically to ensure linear wafer output performance in allocating the selected lots when forming the master production schedule fitting work-in-process in the key stage report to meet requirements of the master production schedule.
GLOSSARY
Cycle Time
(CT)) Time to go from beginning to end of FAB.
Due_Date
(DD) Scheduled Due Date from MPS, i.e. the date when
processing of a lot must be finished for an order placed
on the MPS.
FAB
Fabrication plant.
MPS
Master Production Schedule.
Required_Date
(RD) Date when lot must be finished out according to the
start date and the average cycle time data of the past.
WIP
Work in Process.


REFERENCES:
patent: 5546326 (1996-08-01), Tai et al.
patent: 5612886 (1997-03-01), Weng
patent: 6088626 (2000-07-01), Lilly et al.
Liu et al., “A Methodology for Improving On-Time Delivery and Load Leveling Starts,” IEEE/Semi Advanced Semiconductor Manufacturing Conference, pp. 95-100 (1995).
Murty et al., “Global Planning at Harris Semiconductor, 1995 International Symposium on Semiconductor Manufacturing”, pp. 18-23.
Hoitomt et al., “Scheduling a Batch Processing Facility”, Proceedings of the 1992 IEEE International Conference of Robotics and Automation, Nice France, (1992) pp. 1167-1172.

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