Apparatus for filling a gap between spaced layers of a...

Plastic article or earthenware shaping or treating: apparatus – Distinct means to feed – support or manipulate preform stock...

Reexamination Certificate

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Reexamination Certificate

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06443720

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a method and apparatus for underfilling the gap between a semiconductor device mounted on a substrate, such as a flip chip semiconductor device mounted on a substrate.
2. State of the Art
A flip chip semiconductor device mounted on a substrate is one type of arrangement having a gap formed between the flip chip semiconductor device and the substrate. A semiconductor device is said to be a “flip chip” because it is manufactured in wafer form having its active surface having, in turn, bond pads thereon initially facing upwardly. After manufacture is completed and the semiconductor device simulated from the wafer, it is “flipped” over such that the active interior surface faces downwardly for attachment to a substrate. For attachment to a substrate a flip chip semiconductor device is formed having bumps on the bond pads of the active surface thereof which are used as electrical and mechanical connectors with the substrate. Several materials may be used to form the bumps on the flip chip semiconductor device, such as various types of solder and alloys thereof, conductive polymers, etc. In applications using solder bumps, the solder bumps are reflowed to form a solder joint between the flip chip semiconductor device and the substrate. The solder joint thereby forming both the electrical and mechanical connections between the semiconductor device and the substrate. Because of the presence of the bumps, a gap is formed between the semiconductor device and the substrate.
Since the semiconductor device and the substrate are typically formed of differing materials, the semiconductor device and the substrate have different mechanical properties with differing attendant reactions to operating conditions and mechanical loading thereby causing stress to develop in the bumps connecting the semiconductor device to the substrate. Therefore, the bumps are typically made of sufficient robust size to withstand such anticipated stressful conditions thereby causing a substantial gap to be created between the semiconductor device and the substrate. To enhance the joint integrity between the semiconductor device and the substrate a fill material is introduced into the gap therebetween. The fill material, called an underfill material, helps equalize stress placed on the solder bumps, the semiconductor device, and the substrate as well as helping the bumps and other electrical features of the semiconductor device and the substrate be maintained free from contaminants, including moisture, chemicals, chemical ions, etc.
In some applications, the fill material is typically dispensed into the gap between the semiconductor device and the substrate by injecting the fill material along one, two, or more sides with the underfill material flowing, usually by capillary action to fill the gap. For example, U.S. Pat. No. 5,214,234 (Thompson et al.) discloses a semiconductor device assembly where an epoxy fill material is injected around the perimeter of the chip mated on the substrate. The epoxy material has a viscosity permitting it to flow into the gap. A hole may be provided in the substrate to facilitate positioning the material into the gap.
It has been noted that underfilling the gap by way of capillary action may lead to non-uniform disposition of the fill material within the gap. Typically, the fill material may have bubbles, air pockets or voids. Non-uniform disposition of the material in the gap decreases the fill material's ability to protect the interconnections between the semiconductor device and the substrate and may lead to a reduction in the reliability of the semiconductor device.
In some arrangements, such as those disclosed in U.S. Pat. No. 5,410,181 (Zollo et al.), a hole in the substrate is provided through which access may be had to the circuit for performing various operations thereon, including optical operations associated with the circuit. A plug is positioned in the hole which precludes positioning the fill material in the area associated with the plug. That is, the fill material is inserted with the plug in place in the hole.
U.S. Pat. No. 5,385,869 (Liu et al.) discloses a device in which a gap between the semiconductor device and the substrate is underfilled by forming a large hole through the substrate. The hole may even have gates or notches formed at each corner which extend beyond the hole. The underfill material flows through the hole by way of the gates or notches in the substrate in order to facilitate complete underfilling.
U.S. Pat. No. 5,203,076 (Baneji et al.) teaches one to apply a vacuum to evacuate air from the gap between the chip and the substrate. Air is then slowly allowed to reenter the vacuum to force the underfill material into the gap between the semiconductor device and the substrate.
Underfilling may also be seen in the manufacture of semiconductor devices illustrated in U.S. Pat. No. 5,371,404 (Juskey et al.), U.S. Pat. No. 5,258,648 (Lin), U.S. Pat. No. 5,311,059 (Baneji et al.) and U.S. Pat. No. 5,438,219 (Kotzan et al.).
As previously stated, semiconductor devices that are underfilled or filled with a material in the gap between the semiconductor device and the supporting substrate frequently encounter non-uniform disposition of the fill material. Therefore, improved underfilling methods that improve the quality of the underfilling of the gap between the flip chip type semiconductor device and the substrate, that are cost effective, and that use improved and lower cost fill materials are desired.
BRIEF SUMMARY OF THE INVENTION
In a preferred arrangement of the invention, a semiconductor device assembly includes a flip chip semiconductor device and a substrate having a plurality of thermal vias therein. The flip chip semiconductor device having a first exterior surface and having a second active interior surface having, in turn, bond pads thereon including solder bumps thereon as electrical and mechanical interconnection structure. The substrate comprises a substrate having a metallized surface pattern of electrical circuits thereon for connection with the interconnection structure of a flip chip semiconductor device and a plurality of thermal vias extending therethrough. After the interconnection structure of the flip chip semiconductor device is connected to portions of the metallized surface of the substrate, a fill material is used to fill the gap between the flip chip semiconductor device and the substrate by applying a vacuum through the thermal vias in the substrate and, if desired, fluid pressure to the fill material. Preferably the fill material includes a filler.
A method of making a semiconductor device assembly comprises providing a semiconductor device having a first surface and a second active interior surface. The second active interior surface having one or more bond pads thereon having, in turn, electrical interconnection structure formed thereon and extending therefrom. A substrate includes one side thereof having a metallized surface pattern of electrical circuits thereon for contact with the electrical interconnection structure of the bond pads of the semiconductor device and another exterior surface spaced from the metallized surface. A plurality of thermal vias extend through the substrate from the metallized surface to the other exterior surface. The thermal vias are sized and configured for heat transfer from the gap adjacent the metallized surface of the substrate to the other exterior surface of the substrate. The semiconductor device is connected to portions of the metallized surface of the substrate having the electrical interconnection structure of the bond pads of the semiconductor device contacting the desired portions of the metallized surface of the substrate thereby forming a gap having a perimeter therebetween. Fill material is positioned proximate at least a portion of the perimeter of the gap between the metallized surface and the second surface of the semiconductor device. A source of vacuum is positioned proximate the exterior surface

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