Electrical pulse counters – pulse dividers – or shift registers: c – Applications – Determining machine or apparatus operating time or...
Reexamination Certificate
1999-10-13
2002-03-12
Wambach, Margaret R. (Department: 2816)
Electrical pulse counters, pulse dividers, or shift registers: c
Applications
Determining machine or apparatus operating time or...
C377S002000
Reexamination Certificate
active
06356615
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to digital computer systems, and, more particularly, to a built-in on-chip programmable electronic event counter system useful in analyzing performance of operation of the digital computer system, in debug of the system, and as a source of event based interrupts.
BACKGROUND
Electronic counters are known devices and appear in many forms. For one, as a software counter programmed to be executed by a microprocessor. Another as a digital electronic counter. As known, such counters may be configured to increment, that is, count-up, or decrement, count-down from a prescribed number. Further, they may be programmed or hard-wired to respectively increment to or decrement from a specific number set therein by the respective software program or hard wiring.
Counters have long been used as a component of digital systems, including digital processing systems, with which the present invention is concerned. When used in digital processing systems, counters most often are “built-in” to the semiconductor chip. That is, they are formed on the same semiconductor die on which other semiconductor components, functional units, of the digital processing system are manufactured and with which they are used during operation, such as the processor. As example, applicant was informed that the PENTIUM PRO processor contains two registers that may be programmed to run as counters. They are used for control purposes within the processor, serving to generate a control signal, an interrupt, on underflow or overflow and that interrupt is used in the operation of the microprocessor.
In some digital systems, electronic counters have been used as timers. By directly or indirectly counting high frequency clock pulses, a decrementing counter is able to step down the pulse repetition rate to a lower rate, producing a greater time spacing between output pulses. The pulse-to-pulse time defines a precise time period. Coupled to a flip-flop, a pulse of defined time duration can be produced.
Digital electronic counters have also served to count events. The present invention also relates to digital electronic counters and to event counting in a more esoteric application, to count events and combination of events occurring during the operation of a microprocessor.
A principal object of the invention, thus, is to provide a more efficient system for collecting information from functional units within a digital processing system that tells of events occurring during processor system operation.
A further object of the invention is to provide a more adjustable system for collecting event information from the functional units of a microprocessor by consolidating a number of event counters at a single location on the microprocessor chip and permitting selection of the number (and kind) of event producing functional units to monitor.
An additional object of the invention is to provide a programmable event counting system that is able to count combinations of events arising during a cycle of microprocessor operation wherein the events are combined in accordance with prescriptions of Boolean logic.
And a still additional object of the invention is to provide a processor system which incorporates a hardware event counter to automatically switch between alternative processor functions when a count of an event or a combination of events attains a predetermined number, such as by generating an interrupt, avoiding the necessity for software to handle the event determination and switching functions.
SUMMARY
The foregoing objects are realized by an event counter system formed by consolidating a number of programmable digital electronic counters and multiplexers together at one location on the processor chip. Each multiplexer is associated with at least one of the counters. The multiplexers serve as the gateway of the counter to event information generated at the functional units of the processor.
The plural input channels in each multiplexer are each coupled to multiple locations in the various functional units of the processor whose actions are to be counted, directly or indirectly, and each such functional unit contains a plurality of different outputs coupled to the inputs of the foregoing multiplexers. This permits count of any of the multiple event generating actions of those functional units. As an advantage, the invention avoids the necessity for incorporating separate counters for each of the multiple event generating actions of the individual functional units.
The counter system serves as a source of information on events occurring in the processor system. It is an integral part of the processor chip. And the counter system serves to generate interrupts that facilitate processor operation.
The counter system is programmable under software control. The count taken, the functional unit (or units) monitored for an event, and the source within each functional unit (or units) to be monitored or combined and monitored as a combination signal is selected by software supplied over appropriate buses. The counter system may even be programmed or reprogrammed “on the fly” by the executive program of the processor to use the counter hardware in conjunction with a program operation.
As an additional aspect to the invention, the system includes a combinational logic unit (“signal combiner”) that is able to combine at least two different events in accordance with a Boolean logic criteria, selected under software control, to provide a “combined” event for count. The outputs of the multiplexer are provided to the counters through an associated one of multiple signal combiners. Different events may be logically combined to create combinational events to count. Such events may include, as example, the concurrent occurrence during a clock cycle of two selected events (X AND Y), the occurrence of one event, but not the other (X NOT Y or Y NOT X) and the like bitwise Boolean functions, in addition to individual events produced by a single functional unit (X ONLY or Y ONLY). As an advantage, extremely useful correlations of multiple event inputs may be formulated for count in regard to complex operations occurring within the computer system.
The foregoing and additional objects and advantages of the invention together with the structure characteristic thereof, which was only briefly summarized in the foregoing passages, becomes more apparent to those skilled in the art upon reading the detailed description of a preferred embodiment of the invention, which follows in this specification, taken together with the illustration thereof presented in the accompanying drawings.
REFERENCES:
patent: 4817118 (1989-03-01), Wilburn et al.
patent: 5596390 (1997-01-01), Sawada
patent: 5790625 (1998-08-01), Arimilli
Coon Brett
Keppel David
Price Charles R.
King Stephen L.
Transmeta Corporation
Wambach Margaret R.
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