Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Reexamination Certificate
2000-08-01
2002-01-15
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
C438S110000, C438S114000
Reexamination Certificate
active
06338980
ABSTRACT:
TECHNICAL FIELD
The present invention relates to a method for manufacturing a semiconductor device and an IC chip which can meet demand of small-sizing and thinning. More particularly, the invention relates to a method for manufacturing a chip-scale package and an IC chip, which can manufacture a thin chip-scale package by back grinding in a state where an active face of an IC wafer is protected.
BACKGROUND ART
In recent years, with the advent of single-unit video camera-recorder, portable telephone, and the like, a portable device on which a small-sized package having almost the same size as that of a bare chip, what is called, a CSP (Chip-Scale Package) has appeared. Recently, the CSP which is formed by coating a protective resin on an IC chip is being developed rapidly and it realizes a small, thin, and high-density semiconductor device.
Japanese Patent Application Laid-Open No. 10-79362 discloses a technique regarding a method for manufacturing a chip-scale package to satisfy the demand of small-sizing and thinning.
The technique will be described briefly hereinbelow.
A semiconductor device is manufactured by, generally, a semiconductor device forming process, a bump forming process, a resin sealing process, a projected electrode exposing process, a dicing process, and the like.
In the publication, a method for manufacturing a semiconductor device is disclosed as the nineteenth embodiment.
FIGS. 16A
to
16
C show the method for manufacturing a semiconductor device disclosed as the nineteenth embodiment.
In
FIG. 16A
, before the resin sealing process, a relatively wide groove
105
for dicing is formed in a part in a substrate
116
(wafer on which a number of semiconductor devices are formed) to be diced in a post process. The groove
105
is formed so that a part of the substrate
116
remains on the bottom of the groove
105
. The width of the groove
105
is set so as to be wider than at least the width of a dicer
129
.
In the resin sealing process, a resin layer
130
is formed on the substrate
116
, the groove
105
is filled with a sealing resin to form a resin layer
106
. After completion of the resin sealing process, a dicing process is performed. In the process, as shown in
FIG. 16B
, the substrate
116
is diced into pieces by using the dicer
129
in a dicing position X in the groove
105
filled with the resin layer
106
.
FIG. 16C
shows the diced state of the substrate
116
.
In the dicing process, the dicing process is performed in the groove
105
in which the resin layer
106
is formed, and the resin layer
106
becomes thicker than the other resin layer
130
on the active face. Consequently, the mechanical strength can be enhanced.
Since the resin layer
106
is more flexible than the substrate
116
, a stress applied on the substrate
116
can be absorbed. In the dicing process, therefore, it can prevent occurrence of cracks in the substrate
116
and the resin layer
130
. Also, the manufacturing yield of the semiconductor device can be increased.
At the time point of completion of the dicing process, the resin layer
106
is exposed on a side face of the substrate
116
. In a part corresponding to the bottom of the groove
105
, the diced face of the substrate
116
is exposed. In the event of carrying a semiconductor device, exposed parts in the resin layer
106
are held by using a handling device.
U.S. Pat. No. 5,888,883 discloses a method of dividing a wafer and a method of manufacturing a semiconductor device to satisfy the demand of small-sizing and thinning.
According to this method, the groove, the depth of which is deeper than a thickness of a finished chip is formed on one surface of a wafer along dicing line. After the wafer is fixed on a table of a grinding device by a PSA tape, the other surface opposing to the PSA tape of the wafer is grinding to reach the grooves. Thereby, the wafer is easily divided into the individual chips.
However, these above-mentioned methods for manufacturing the semiconductor device have a problem that the exposed parts are often damaged by the handling device, since the diced face and the corners of the substrate are exposed.
Japanese Patent Application Laid-Open No. 10-79362 also discloses, as the twenty-first embodiment, a method for manufacturing a semiconductor device, which prevents a damage at the time of handling by forming a resin layer on the whole side faces of the diced substrate
116
so as to cover the exposed parts.
FIGS. 17A
to
17
D show the method for manufacturing the semiconductor device according to the twenty-first embodiment.
In the embodiment, as shown in
FIGS. 17A
to
17
D, before the resin sealing process, a first dicing process is performed to dice the substrate
116
into semiconductor devices
112
. Bumps
120
and electric circuits are formed on each of the semiconductor devices
112
.
After completion of the first dicing process, the resin sealing process is performed. In the resin sealing process, as shown in
FIG. 17A
, the semiconductor devices
112
once diced are aligned and mounted on a film member
113
as a base material in a state where a gap
114
is formed between the neighboring semiconductor devices
112
.
At this time, the semiconductor device
112
is adhered to the film member
113
by using an adhesive.
As described above, after the semiconductor devices
112
are mounted on the film member
113
, a resin compression molding process is carried out, and the resin layer
130
is formed on the surface of the semiconductor devices
112
. The resin layer
106
is formed in the gap
114
.
Subsequently, a projected electrode exposing process of exposing at least the tip of each of the bumps
120
from the resin layer
130
is performed.
FIG. 17B
shows a state where the processes are finished.
Subsequently, in a second dicing process, the slicing process is performed in a position between the neighboring semiconductor devices
112
, that is, in the position where the resin layer
106
is formed. The resin layer
106
is sliced together with the film member
113
into, as shown in
FIG. 17C
, the semiconductor devices
112
on which the resin layer
130
is formed. Subsequently, as shown in
FIG. 17D
, the film member
113
is removed.
As described above, since the side faces and corners of the diced semiconductor devices
112
are covered with a resin, the resin parts can be held by the handling device. Consequently, the semiconductor device
112
can be prevented from being damaged.
The above-described method for manufacturing the semiconductor device has, however, the following problems.
Specifically, in the twenty first embodiment, the substrate is preliminarily sliced into semiconductor devices and the semiconductor devices are aligned at predetermined intervals and adhered to the film member. The work is therefore troublesome and the productivity is extremely low.
In order to serve the demand of a thinner semiconductor device in the market, it can be considered that a thinner IC wafer is used from the beginning. When the thinner IC wafer is processed by the above-described manufacturing method, however, the following problem occurs.
In the manufacturing process, for example, when a very small crack occurs at the time of grinding the IC wafer, the crack may progress during formation of bumps in the bump forming process. The progress of the crack causes many fractures in the wafer and severely deteriorates the manufacturing yield.
It is an object of the invention to provide a method for manufacturing a chip-scale package and an IC chip, which facilitate handling at the time of manufacturing a semiconductor device with satisfying the demands of small-sizing and thinning. It is an another object of the invention to provide a method for manufacturing a cheap chip-scale package and an IC chip with high productivity by preventing occurrence of fractures in a chip.
DISCLOSURE OF INVENTION
According to one aspect of the present invention, in order to achieve the object, there is provided a method for manufacturing a chip-scale package, comprising: a semiconductor
Citizen Watch Co. Ltd.
Jones Josetta I.
Kanesaka & Takeuchi
Niebling John F.
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