Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular chip input/output means
Reexamination Certificate
2000-06-05
2002-03-05
Tran, Minh Loan (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Gate arrays
With particular chip input/output means
C257S202000, C257S409000, C326S080000, C327S108000, C327S333000
Reexamination Certificate
active
06353239
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an input/output port of a semiconductor integrated circuit device.
2. Description of the Related Art
When a semiconductor integrated circuit device transfers signals to and from an external device (an input/output device or another semiconductor integrated circuit device), the circuit of the semiconductor integrated circuit device may have an operating voltage that is different from that of the external device. In such a case, the voltage is converted by a voltage converting section provided in the input/output port of the semiconductor integrated circuit device.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a semiconductor integrated circuit device having a port that functions as at least one of an input port and an output port, and that can operate at a high speed.
(1) In accordance with one embodiment of the present invention, a master slice type semiconductor integrated circuit device comprises a semiconductor substrate on which a circuit section is formed, and a port section connected with the circuit section. In one aspect, the port section functions as at least one of an input port and an output port. The port section may be provided with a voltage converting section for converting a first voltage into a second voltage that differs from the first voltage. The voltage converting section includes a first section having a first field effect transistor, and a second section having a second field effect transistor. A gate insulating layer of the first field effect transistor has a film thickness which differs from a film thickness of a gate insulating layer of the second field effect transistor.
When the thickness of the gate insulating layer is unnecessarily large, the operation of the field effect transistor becomes slow because the channel forming speed slows down. The gate insulating layer of the first field effect transistor in the first section of the voltage converting section has the thickness which differs from that of the gate insulating layer of the second field effect transistor in the second section of the voltage converting section. As a result, the thickness of the gate insulating layer that matches a given voltage can be selected in the voltage converting section. The operating speed of the port section can thus be increased.
The circuit section may be any one of a logic circuit, ROM, RAM, or analog circuit, or a combination of these.
(2) In one embodiment, the voltage converting section may function as an output port and include a predriver for inputting and outputting a first voltage signal, and a driver for inputting and outputting a second voltage signal. The predriver has a wave shaping function for a signal transmitted from the circuit section. An external input device, output device, input/output device, or another semiconductor integrated circuit device are driven by the driver.
(3) In one embodiment, the voltage converting section may comprise a level shifter; the first section of the voltage converting section may comprise a first part of the level shifter; the first voltage signal may be input in and output from the first part of the level shifter; the second section of the voltage converting section may comprise a second part of the level shifter; and the first voltage signal may be input in and the second voltage signal may be output from the second part of the level shifter. The level shifter is an example of a voltage converting section.
(4) In one embodiment, the predriver may be connected with the circuit section and the first part of the level shifter, and the driver may be connected with the second part of the level shifter.
(5) In one embodiment, the thickness of a gate insulating layer of the field effect transistor being a component of the predriver may be equal to (or substantially the same as) the thickness of a gate insulating layer of the first field effect transistor being a component of the level shifter. Also, the thickness of a gate insulating layer of the field effect transistor being a component of the driver may be equal to (or substantially the same as) the thickness of a gate insulating layer of the second field effect transistor being a component of the level shifter. In one embodiment, the gate insulating layers of field effect transistors in which the same voltage is applied to their respective gate electrodes may have the same thickness.
(6) In one embodiment, the circuit section may be operated by the first voltage; and the thickness of a gate insulating layer of the field effect transistor being a component of the circuit section, the thickness of the gate insulating layer of the field effect transistor being the component of the predriver, and the thickness of the gate insulating layer of the first field effect transistor being the component of the first part of the level shifter may be equal to one another. In one embodiment, the gate insulating layers of field effect transistors in which the same voltage is applied to their respective gate electrodes may have the same thickness.
(7) In one embodiment, a region where the predriver and the first part of the level shifter are formed may be located between a region where the circuit section is formed and a region where the driver and the second part of the level shifter are formed.
The semiconductor integrated circuit device has many regions where various field effect transistors are formed. For example, in one region, the first voltage is applied to gate electrodes of the filed effect transistors (e.g., the predriver and the first part of the level shifter, and the circuit section). In another region, the second voltage is applied to gate electrodes of the field effect transistors (e.g., the driver and the second part of the level shifter). In accordance with the present invention, these regions can be disposed with reduced complexity. Accordingly, the device structure achieved by the present invention is advantageous in a gate array and an embedded array.
(8) In one embodiment, on the semiconductor substrate, the region where the predriver and the first part of the level shifter are formed may be located outside the region where the circuit section is formed. Further, the region where the driver and the second part of the level shifter are formed may be located outside the region where the predriver and the first part of the level shifter are formed.
(9) In one embodiment, the port section functions as an input port.
(10) In one embodiment, the voltage converting section may comprise a level shifter. In this embodiment, the first section of the voltage converting section may comprise a second part of the level shifter; and the first voltage signal may be input into and output from the second part of the level shifter. The second section of the voltage converting section may comprise a first part of the level shifter; and the second voltage signal may be input into and the first voltage signal may be output from the first part of the level shifter. The level shifter is an example of a voltage converting section.
(11) In one embodiment, the circuit section may be operated by the first voltage. In this embodiment, the thickness of a gate insulating layer of the field effect transistor being a component of the circuit section may be equal to the thickness of a gate insulating layer of the first field effect transistor being a component of the second part of the level shifter. In one embodiment, the gate insulating layers of field effect transistors that are operated with the same operating voltage may have the same thickness.
(12) In one embodiment, a region where the second part of the level shifter is formed may be located between a region where the circuit section is formed and a region where the first part of the level shifter is formed.
As a result, the this embodiment reduces the complexity in arranging regions where various field effect transistors that are operated with the first voltage and the second voltage are formed. For example, in one of the r
Hogan & Hartson L.L.P.
Seiko Epson Corporation
Tran Minh Loan
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