Video-signal processing apparatus providing a first clock...

Motion video signal processing for recording or reproducing – Local trick play processing – With randomly accessible medium

Reexamination Certificate

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Details

C348S498000, C360S051000

Reexamination Certificate

active

06453109

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a video-signal processing apparatus, and more particularly, to the generation of a clock signal for processing a video signal.
2. Description of the Related Art
Digital VCR's (video cassette recorders) which (i) record a video signal, supplied:. from the outside, on a magnetic tape by digitizing the signal, and (ii) output a reproduced digital video signal to the outside are known.
It is desirable that such digital VCR's, as well as conventional analog VCR's, record/reproduce both a digital video signal supplied from the outside and an analog video signal supplied from the outside.
In order to record/reproduce various video signals supplied from the outside, a plurality of clock signals having different frequencies are required in an input/output circuit and a signal processing circuit for a video signal.
For example, in a circuit for inputting/outputting a digital video signal, a clock signal synchronized with an input digital video signal is required. In a circuit for inputting/outputting an analog video signal, a clock signal synchronized with a horizontal synchronizing signal in the input video signal, or a clock signal having a frequency equal to an integer multiple of a subcarrier frequency is frequently used. In a circuit for compressing/encoding a digital video signal, a clock signal different from these clock signals is also used.
When a plurality of circuit blocks having different operational clock frequencies are present, it is difficult to perform system design because, for example, additional circuits, such as FIFO (first-in first-out) memory and the like, are required in order to exchange a signal between the blocks, and timing control between signals is required.
If it is intended to commonly use a clock frequency of a digital signal processing system, many circuits are required for modulation/demodulation of a color signal. If it is intended to commonly use a clock frequency of an analog signal processing system, digital input/output cannot be performed.
A method of selecting a frequency suitable for all blocks by using a clock signal having a considerably high frequency may be considered. This method, however, provides excessive specifications for blocks for which a relatively low frequency suffices, resulting in an increase in power consumption and circuit scale.
SUMMARY OF THE INVENTION
It is an object of the present invention to solve the above-described problems.
It is another object of the present invention to efficiently supply, when processing a plurality of video signals, each circuit block for processing a corresponding signal with a clock signal.
According to one aspect, the present invention which achieves these objectives relates to a signal processing apparatus for processing a video signal, including first clock generation means for generating a first clock signal having a constant frequency, detection means for detecting a phase change in an input video signal, second clock generation means for generating a second clock signal having a frequency different from the frequency of the first clock signal by selectively using the first clock signal and an output from the detection means, and signal processing means for processing the video signal using the second clock signal.
According to another aspect, the present invention which achieves these objectives relates to a recording and reproducing apparatus, including input/output means for inputting/outputting a video signal, detection means for detecting a phase change in the video signal input from the input/output means, first clock generation means for generating a first clock signal having a constant frequency, second clock generation means for generating a second clock signal having a frequency different from the frequency of the first clock signal by selectively using an output from the detection means and the first clock signal, signal processing means for processing the video signal using the second clock signal, and recording/reproducing means for recording the video signal processed by the signal processing means on a recording medium:, and for reproducing the video signal from the recording medium and outputting the reproduced video signal to the signal processing means. The apparatus has a recording mode in which the second clock generation means generates the second clock signal using the output of the detection means, the signal processing means processes the input video signal, and the recording/reproducing means records the video signal output from the signal processing means, and a reproducing mode in which the recording/reproducing means reproduces a video signal, the second clock generation means generates the second clock signal using the first clock signal, and the signal processing means processes the reproduced video signal and outputs the resultant signal to the input/output means.
According to still another aspect, the present invention which achieves these objectives relates to a clock generating device, including first generation means for generating a first clock signal having a constant frequency, detection means for detecting an amount of a phase change in an input signal, and second generation means for generating a second clock signal by selectively using the first clock signal and an output from the detection means.
The foregoing and other objects, advantages and features of the present invention will become more apparent from the following detailed description of the preferred embodiment taken in conjunction with the accompanying drawings.


REFERENCES:
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patent: 5475439 (1995-12-01), Shimokoriyama
patent: 5596554 (1997-01-01), Hagadorn
patent: 5745314 (1998-04-01), Ikeda et al.
patent: 5982574 (1999-11-01), Leake et al.
patent: 6002536 (1999-12-01), Arai et al.
patent: 6115265 (2000-09-01), Barlage
patent: 6292016 (2001-09-01), Jefferson et al.

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