Semiconductor device manufacturing: process – Having magnetic or ferroelectric component
Reexamination Certificate
2001-04-03
2002-03-19
Bowers, Charles (Department: 2813)
Semiconductor device manufacturing: process
Having magnetic or ferroelectric component
Reexamination Certificate
active
06358757
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of Invention
The present invention pertains to the field of magnetic memories. More particularly, this invention relates to providing a magnetic memory with structures that prevent disruptions to magnetization in sense layers.
2. Art Background
A magnetic memory such as a magnetic random access memory (MRAM) typically includes an array of magnetic memory cells. Each magnetic memory cell usually includes a sense layer and a reference layer. The sense layer is usually a layer or film of magnetic material that stores magnetization patterns in orientations that may be altered by the application of external magnetic fields. The reference layer is usually a layer of magnetic material in which the magnetization is fixed or “pinned” in a particular direction.
The logic state of a magnetic memory cell typically depends on its resistance to electrical current flow. The resistance of a magnetic memory cell usually depends on the relative orientations of magnetization in its sense and reference layers. A magnetic memory cell is typically in a low resistance state if the overall orientation of magnetization in its sense layer is parallel to the orientation of magnetization in its reference layer. In contrast, a magnetic memory cell is typically in a high resistance state if the overall orientation of magnetization in its sense layer is antiparallel to the orientation of magnetization in its reference layer.
Typically, the overall magnetization pattern in the sense layer of a magnetic memory cell includes magnetization in its interior region and magnetization in its edge regions. In prior magnetic memory cells, demagnetization fields commonly present in the edge regions of the sense layer disrupt the overall orientation of magnetization in the sense layer from the desired parallel and antiparallel orientations. In addition, coupling fields and demagnetization fields from the reference layer can disrupt the magnetization of the sense layer from the desired parallel or antiparallel orientations. Such disruptions may manifest as undesirable magnetic domains.
Unfortunately, such disruptions to magnetization in the sense layer usually obscure the high and low resistance states of a magnetic memory cell, thereby making it difficult to determine the logic state of the magnetic memory cell during a read operation. In addition, the degree of disruption to sense layer magnetization may vary among the magnetic memory cells in an MRAM array and may vary between different MRAM arrays due to variation in the patterning steps and/or deposition steps of device manufacture. Such variation in the sense layer magnetization states usually leads to variations in the threshold switching field. Such variations in the threshold switching field typically produces uncertainty in MRAM write operations.
SUMMARY OF THE INVENTION
A magnetic memory cell is disclosed having a structure that prevents disruptions to the magnetization in the sense layer of the magnetic memory cell. In one embodiment, the structure includes a high permeability magnetic film that serves as a keeper for the sense layer magnetization. The keeper structure provides a flux closure path that directs demagnetization fields away from the sense layer. In another embodiment, the structure contains a hard ferromagnetic film that applies a local magnetic field to the sense layer in the magnetic memory cell.
The present techniques yield greater repeatability of magnetization characteristics among the magnetic memory cells in MRAM arrays. The structure has an additional advantage of enlarging the effective volume of the magnetic memory cell, thereby improving the thermal stability of the stored magnetization state. The structure also functions as an electromagnet to facilitate writing of the magnetic memory cells, thereby reducing MRAM power consumption.
Other features and advantages of the present invention will be apparent from the detailed description that follows.
REFERENCES:
patent: 4455626 (1984-06-01), Lutes
patent: 5748524 (1998-05-01), Chen et al.
patent: 5861328 (1999-01-01), Tehrani et al.
patent: 5940317 (1999-08-01), Durlam et al.
patent: 5956267 (1999-09-01), Hurst et al.
Bowers Charles
Thompson Craig
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