Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Making plural separate devices
Reexamination Certificate
2000-02-04
2002-04-23
Bowers, Charles (Department: 2813)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Making plural separate devices
C438S108000, C438S113000, C438S464000
Reexamination Certificate
active
06376278
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates in general to a method for making a semiconductor device, and more particularly, to a method for making a semiconductor device having a flip chip configuration.
This is a counterpart of Japanese patent application, Serial Number 94832/1999, filed Apr. 1, 1999.
2. Description of the Related Art
As the integration density of IC chips continues to increase, the overall size of the IC chips tends to increase as well. On the other hand, as high density assembly of devices is the norm, it is still highly desirable that the packages for housing the increasingly larger IC chips be as small and thin as possible.
To this end, a semiconductor package called a “chip scale package” or “chip size package” (CSP) has been recently developed. The CSP is formed of a size which is similar to that of the IC chip.
A flip chip semiconductor device is one of the package types used to obtain a CSP configuration. The flip chip semiconductor device has a semiconductor chip and a package substrate which faces an active surface of the semiconductor chip and couples to the chip through bump electrodes formed on the active surface of the chip. The flip chip semiconductor device is mounted to a substrate, e.g., a printed circuit board.
Many manufacturing steps are needed to obtain the flip chip semiconductor device. Therefore, a manufacturing time period becomes long and a manufacturing cost (an assembling cost) tends to increase.
A need exists for an improved method for making a semiconductor device, and more specifically for an improved method for making a semiconductor device having a flip chip configuration.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a method for making a semiconductor device that may reduce manufacturing costs.
It is an object of the present invention to provide a method for making a semiconductor device that may reduce manufacturing steps.
It is another object of the present invention to provide a method of making a semiconductor device that may reduce a manufacturing time period.
According to one aspect of the present invention, for achieving the above object, there is provided a method for making a semiconductor device which includes attaching a first adhesive tape onto a first major surface of a semiconductor wafer, and wherein the semiconductor wafer has a plurality of semiconductor chip regions; forming protrusion electrodes on a second major surface of the semiconductor wafer within the plurality of semiconductor chip regions; removing portions of the semiconductor wafer located between the plurality of chip regions to form a plurality of semiconductor chips; expanding intervals between the semiconductor chips; coupling respective first major surfaces of wiring substrates to corresponding second major surfaces of the semiconductor chips by protrusion electrodes to form preliminarily structures each of which is comprised of the semiconductor chip and the wiring substrate; attaching a second adhesive tape onto second major surfaces of the wiring substrates; removing the first adhesive tape from the semiconductor chips; applying a resin to gaps between the semiconductor chips and the wiring substrates; and removing the second adhesive tape from the wiring substrates to form the semiconductor devices.
The above and further objects and novel features of the invention will more fully appear from the following detailed description, appended claims and the accompanying drawings.
REFERENCES:
patent: 5518964 (1996-05-01), DiStefano et al.
patent: 5817545 (1998-10-01), Wang et al.
patent: 5989982 (1999-11-01), Yoshikazu
patent: 6004867 (1999-12-01), Kim et al.
patent: 6054772 (2000-04-01), Mostafazadeh et al.
patent: 6189591 (2001-02-01), Ariye et al.
patent: 5-41541 (1993-02-01), None
patent: 11-307587 (1999-11-01), None
Egawa Yoshimi
Niigaki Takeshi
Shinchi Kazumi
Oki Electric Industry Co. Ltd.
Volentine & Francos, PLLC
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