Monitoring fault in control device CPU containing exercise...

Data processing: vehicles – navigation – and relative location – Vehicle control – guidance – operation – or indication – Vehicle diagnosis or maintenance indication

Reexamination Certificate

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Details

C701S033000, C701S102000, C701S107000, C714S025000, C714S031000, C714S032000

Reexamination Certificate

active

06366839

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a central processing unit (CPU) monitoring system for detecting an abnormality in a central processing unit installed in a control device.
2. Description of the Related Art
There is an earlier CPU monitoring system (not prior art) of a mutual monitoring type, which carries out the identical calculation by two central processing units and compares both calculation results with each other thereby to detect the abnormality in either one of the units.
FIG. 1
shows one example in which the above-mentioned CPU monitoring system is applied to a CPU for performing the throttle-valve control in an engine for a vehicle.
In the shown structure, a main-CPU
20
has a calculating section
21
which calculates a control value for the throttle opening by detection values on an acceleration pedal sensor
5
and a throttle position sensor
6
and outputs the control value to a drive circuit
7
. The drive circuit
7
is provided for driving a motor
7
to adjust the opening of a not-shown throttle valve.
The control value resulting from the calculation at the calculating section
21
is further outputted to a judging section
22
and another judging section
25
of a sub-CPU
23
.
Additionally, the detection values on the acceleration pedal sensor
5
and the throttle position sensor
6
are also brought into a calculating section
24
of the sub-CPU
23
in order to perform the calculating identical to that at the calculating section
21
. The calculation result obtained by the calculating section
24
is outputted to both judging section
22
and judging section
25
, too.
At each of the judging sections
22
,
25
, it is carried out to compare the control vale with the calculating result. In case of agreement between the control value and the calculating result, each judging section
22
,
25
does output a signal of high level to an AND gate circuit
14
. While, in case of disagreement, each judging section
22
,
25
does output a signal of low level to the circuit
14
.
Thus, only when the agreement are confirmed at both judging sections
22
,
25
, the AND gate circuit
14
generates the output signal of high level thereby to activate a transistor
16
. Consequently, a relay
15
for supplying power to the motor
8
is so energized that the motor
8
can be controlled by the main-CPU
20
.
On the contrary, if the incorrect calculation is performed at either main-CPU
20
or sub-CPU
23
due to the abnormality, the signals of low level are inputted from the judging sections
22
,
25
since each control value is not identical to each calculation result.
Thus, the AND gate circuit
14
generates the output signal of low level thereby to inactivate the transistor
16
. Consequently, the relay
15
for supplying power to the motor
8
is not energized, so that the power supply to the motor
8
is cut-off to prevent it from being controlled by the main-CPU
20
.
In the above-mentioned CPU monitoring system, however, there is a problem of increasing the manufacturing cost since the sub-CPU also requires the calculating functions similar to those of the main CPU.
Furthermore, if the modification in specifications requires to modify the calculation program in the main-CPU, then it becomes necessary to change the calculation program in the sub-CPU, thereby causing the number of modifying steps for the modification to be increased.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a central processing unit (CPU) monitoring system in which a monitoring unit has a simple structure and which makes it unnecessary to change the monitoring unit in case of changing the control specification required for the CPU, whereby the manufacturing cost of the system can be reduced.
According to the present invention, the above-mentioned object of the present invention can be accomplished by a CPU monitoring system comprising:
a CPU for executing a designated control program, the CPU including an exercise calculating section for carrying out a predetermined exercise program; and
a monitoring unit for monitoring the operation of the CPU executing the designated control program;
wherein the monitoring unit outputs proposal data to the exercise calculating section of the CPU and further judges whether or not the CPU has an abnormality in the operation on the basis of calculation results obtained by the exercise calculating section processing the proposal data.
The above and other features and advantages of this invention will become apparent, and the invention itself will best be understood, from a study of the following description and appended claims, with reference to the attached drawings showing one preferred embodiment of the invention.


REFERENCES:
patent: 4933941 (1990-06-01), Eckard et al.
patent: 5802071 (1998-09-01), Fang et al.
patent: 6158021 (2000-12-01), Ziegler et al.
patent: 6243629 (2001-06-01), Sugimoto et al.

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