Electrical computers and digital processing systems: multicomput – Network computer configuring – Reconfiguring
Reexamination Certificate
1998-06-04
2002-03-26
Rinehart, Mark H. (Department: 2756)
Electrical computers and digital processing systems: multicomput
Network computer configuring
Reconfiguring
C709S220000
Reexamination Certificate
active
06363420
ABSTRACT:
COMPACT-DISC APPENDIX
Two Compact Disc-Recordables (CD-Rs, Copy 1 and Copy 2), containing a computer program listing, constitute a part of the specification of this invention pursuant to 37 C.F.R. 1.77 and 1.96, and is incorporated by reference herein for all purposes. Each CD-R includes an identical single file named APPEND.TXT.;1 which conforms to the ISO 9660 standard, was created on the CD-R on Jul. 9, 2001, and contains 338 kilobytes on the CD-R (actual size of the file is 345,469 bytes).
FIELD OF THE INVENTION
The invention relates generally to a method and system for managing complex telecommunications networks and, more particularly, to performing extremely complex combinations of functions in which the functions can be modified by the system in response to experience.
BACKGROUND OF THE INVENTION
There are severe constraints on the architecture of systems which perform complex combinations of functionality using large numbers of devices. These constraints derive from the need to construct, repair and modify the system. Such needs require a means to relate functionality at a high level to the functionality of individual devices and groups of devices. Such systems are therefore constrained to adopt a simple functional architecture. In a functional architecture, functionality is partitioned into components and the components into subcomponents through a number of levels down to the device level. In a simple functional architecture, the components on one level perform roughly equal proportions of functionality, and the necessary information exchange between components is minimized.
The predominant functional architecture is the instruction architecture in which the information exchanged between functional components is unambiguous to the receiving component. Use of unambiguous information results in the memory/processing separations observed in commercial electronic systems. The von Neumann architecture is a special case of the instruction architecture in which functionality is coded as unambiguous information. A drawback with the instruction architecture, and with the von Neumann architecture in particular, is that functionality must be performed sequentially and, furthermore, it is difficult to construct systems which heuristically modify their own functionality.
Neural networks have attempted to overcome the drawbacks of the instruction architecture, but they make the use of unambiguous information from instruction architecture design approaches. As a result, neural networks cannot scale up from the device level to a higher level of heuristically modified, complex functionality.
Therefore, what is needed is an architecture which can scale up to complex functionality, and which is not difficult to construct, repair, and modify.
SUMMARY OF THE INVENTION
The invention includes a method and system for performing combinations of functions which can heuristically modify the functional components of the machine, separate such functional components down to the device level, and optimize the distribution of information between the functional components, by defining the domains for the network, acquiring data for each domain at each of a plurality of points in time, creating repetition clusters by looking for combinations of data that recur, identifying action to be performed based on the repetition clusters; and acquiring data from the consequences of actions performed.
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Carr & Storm, L.L.P.
Mortel Networks Limited
Rinehart Mark H.
Thompson Marc D.
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