Low-frequency, high-gain amplifier with high DC-offset...

Amplifiers – Sum and difference amplifiers

Reexamination Certificate

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C330S258000

Reexamination Certificate

active

06396343

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to the field of amplifier circuits, and in particular to low-frequency amplifier circuits.
BACKGROUND OF THE INVENTION
Amplifier circuits utilizing operational amplifiers are well known in the art. For such circuits, it is well understood that only the values of the surrounding impedances need to be properly selected to control the gain of the circuits. If a DC offset voltage needs to be removed from the input signal, a DC-blocking capacitor is added to the circuit. For most applications where the frequency of the input signal is not extremely low and the gain requirement is not very high, standard off-the-shelf components can be used for the amplifier.
In some instances, however, the input signal has extremely low frequency while the gain requirement is very high. An example of such a situation can be found in the instrumentation amplifier (IA) to be used for amplifying the electrical signals of the heart. The graphical recording to these heart signals is known as electrocardiograms (ECG). The instrumentation amplifier to be used for amplifying ECG signals must have the ability to reject DC offset voltages generated between a pair of ECG electrodes. The offset voltage results from unequal contact potentials at the electrode-skin interface caused by electrochemical half-cells which form when ions between the electrode and the skin interchange. The offset voltage, which is typically around 100 mV, is very large compared to the electrocardiogram signals which are around 1 mV.
Most IAs used for ECG provide the DC offset rejection capability by dividing the IA circuit into two stages—a low-gain DC differential amplifier at the front stage followed by a high gain AC amplifier. A typical IA circuitry is shown in
FIG. 1
with a gain in the front stage,
5
, being 20 and the gain in the back stage,
10
, being 50, resulting in an overall gain of 1000 (or 1 V/mV amplification). The AC amplifier cut-off frequency is 0.05 Hz. Gains of 20 and 50 are typical for IAs. As can be seen from
FIG. 1
, the first stage also includes the circuitry,
15
, for rejecting the common mode signal.
Analytically, it can be shown that the differential gain of the 1
st
stage of the amplifier in
FIG. 1
is:
A
DS
=
1
+
R
1
+
R
2
R
C
Since this gain has no frequency discrimination, both the ECG and the DC offset signals will be equally amplified. Because the DC offset voltage is much higher than the signal being amplified, it can be seen that the circuitry of
FIG. 1
would certainly saturate the output, if the circuit is not divided into two stages. Although by adding a capacitor X
C
in series with R
C
frequency discrimination can be obtained, simultaneously achieving 0.05 Hz cut-off frequency and a high gain is currently impractical with standard off-the-shelf components.
The inclusion of the additional stage increases the number of operational amplifiers needed in the overall amplifier circuit. Moreover, it can shown that this prior art amplifier circuit has a low DC offset tolerance, and hence, any aberrant peak in the ECG signal may cause at least a portion of the output to saturate. Such a result is highly undesirable as the ECG reading may falsely indicate a condition in the heart which is, in fact, non-existent.
OBJECT OF THE INVENTION
It is an object of the present invention to overcome the shortcomings of the prior art amplifier.
Particularly, it is an object of the present invention to provide an amplifier circuit which can remove the DC offset while achieving high gain.
It is another object of the present invention to provide an amplifier circuit which minimizes the number of operation amplifiers used.
It is yet another object of the present invention to provide an amplifier circuit which can be made using all off-the-shelf components.
SUMMARY OF THE INVENTION
The instrumentation amplifier circuit of the present invention is particularly suited for amplifying ECG signals, rejecting common mode signals and removing a DC offset. The preferred embodiment of the present invention basically comprises a front-stage differential amplifier, and a common-mode rejection circuit. By employing a twin-T network, the front stage differential amplifier is able to simultaneously remove the DC offset and achieve high gain using standard off-the-shelf components. The common mode differential gain, however, is zero, which is the desired result. The common-mode rejection circuit removes the common-mode signal to yield only the amplified ECG signal. The present amplifier circuit has a much greater DC offset tolerance than the prior art amplifier while the Common Mode Rejection Ratio (CMRR), residual noise at the output, and the input dynamic range is comparable to that of the prior art amplifier. Moreover, it requires fewer operational amplifiers.


REFERENCES:
patent: 4887045 (1989-12-01), Nakayama
patent: 5095282 (1992-03-01), Dayton
patent: 5300896 (1994-04-01), Suesserman
patent: 5568561 (1996-10-01), Whitlock
patent: 6211731 (2001-04-01), Fiori, Jr.
patent: 6222416 (2001-04-01), Edeler

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