Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2000-09-18
2002-03-12
Bowers, Charles (Department: 2813)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C257S510000
Reexamination Certificate
active
06355538
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to methods of forming shallow trench isolation structures in integrated circuit chips and more specifically to forming isolation trenches wherein the material filling the trenches extends beyond the trench edges.
2. Description of the Related Art
Device isolation techniques are important in the design and operation of integrated circuit chips where spacing between devices is very small. LOCOS or local oxidation of silicon has been frequently used to accomplish this device isolation however there are problems with the use of LOCOS in structures with small device separation such as the well known birds beak formation at the edge of the isolation region.
Shallow trench isolation has been used frequently in designs having reduced separation between devices but there are also problems with the use of shallow trench isolation, such as that illustrated in FIG.
1
.
FIG. 1
shows a cross section of a portion of an integrated circuit chip
10
using shallow trench isolation.
FIG. 1
shows a trench in an integrated circuit chip
10
filled with a dielectric material
12
. A problem can be encountered in the formation and filling of the trenches wherein the dielectric filling the trenches can be etched away at the edge of the trench forming gaps
14
, as shown in FIG.
1
. These gaps
14
will be a problem in future processing steps.
Patent application Ser. No. 09/655,082, filed on Sep. 5, 2000 entitled “METHOD OF FORMING ISOLATION MATERIAL WITH SMOOTH PROFILE”, and assigned to the same Assignee describes methods of forming trench isolation structures wherein the dielectric filling the trenches has a smooth profile without gaps.
U.S. Pat. No. 5,940,716 to Jin et al. describes a method of forming isolation trenches which overcomes the problems of the gaps
14
shown in FIG.
1
. Jin et al. describe a method wherein the dielectric used to fill the trench overlaps the top edge of the trench to avoid the gaps. In the method described by Jin et al. a trench is formed in a structure comprising a substrate having a first dielectric formed thereon and a second dielectric formed on the first dielectric. The structure is then etched with an etchant which preferably etches the second dielectric relative to the first dielectric and substrate to enlarge the opening in the second dielectric.
SUMMARY OF THE INVENTION
It is a principal objective of this invention to provide a method of forming trench isolation structures wherein the isolation trench is filled with dielectric which extends beyond the edges of the trench, and thereby avoids the formation of gaps.
This objective is achieved by forming a layer of first dielectric on a silicon substrate and a layer of silicon or silicon nitride on the layer of first dielectric. The silicon can be either polysilicon or amorphous silicon. A resist mask having a trench opening is then formed on the layer of silicon or silicon nitride. An isotropic lateral etch, either a plasma isotropic lateral etch or a chemical wet etch, is then used to etch that part of the silicon or silicon nitride directly under the trench opening in the resist mask and to undercut the silicon or silicon nitride a first distance beyond the edge of the trench opening in the resist mask. This forms an oversize trench opening in the layer of silicon or the layer of silicon nitride.
Vertical anisotropic etching is then used to etch away that part of the layer of first dielectric directly under the trench opening in the resist mask and a second distance into that part of the silicon substrate directly under the trench opening in the resist mask. This forms a trench opening in the layer of first dielectric and a trench in the silicon substrate. The resist mask is then removed.
The trench in the silicon substrate, the trench opening in the layer of first dielectric, and the oversize trench opening in the layer of silicon or the layer of silicon nitride are then filled with second dielectric. Any second dielectric above the top surface of the layer silicon or silicon nitride is then removed. The layer of silicon or silicon nitride is then removed. That part of the layer of first dielectric not covered by the second dielectric is then removed forming a second dielectric plug filling the trench in the silicon substrate and extending beyond the edges of the trench in the silicon substrate.
REFERENCES:
patent: 5578518 (1996-11-01), Koike et al.
patent: 5712185 (1998-01-01), Tsai et al.
patent: 5880004 (1999-03-01), Ho
patent: 5940716 (1999-08-01), Jin et al.
patent: 6090684 (2000-07-01), Itshitsuka et al.
patent: 6103635 (2000-08-01), Chau et al.
patent: 6242323 (2001-06-01), Ishitsuka et al.
patent: 0 098 374 (1984-01-01), None
patent: 000603106 (1994-06-01), None
patent: 176604 (1993-05-01), None
Ackerman Stephen B.
Blum David S
Bowers Charles
Prescott Larry J.
Saile George O.
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