Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage
Reexamination Certificate
1999-08-30
2002-03-05
Cunningham, Terry D. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific identifiable device, circuit, or system
With specific source of supply or bias voltage
C327S534000
Reexamination Certificate
active
06353356
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to semiconductor integrated circuits. More particularly, it pertains to devices and methods to transfer a high voltage signal in an output stage of a charge pump circuit.
BACKGROUND OF THE INVENTION
Integrated circuits often require supply voltages of greater potential than that provided by an external voltage source. Memory circuits such as dynamic random access memories (DRAMs) and video DRAMs require higher internal voltages to pre-charge memory word lines and the like. Flash memories may require high voltages for operations, such as programming or erasing. Integrated circuits that are dependent upon a limited external power supply, such as a battery, must generate additional supply voltages using conversion circuitry. Charge pumps have been used as on-chip voltage generators capable of providing a voltage more positive than the most positive external supply or more negative than the most negative external supply.
Charge pump circuits comprise a number of conditioning stages. What has been frustrating in prior charge pump circuits is that the produced voltages at the output stage seem to degrade from the desired level. This degradation is made worse at the output stage because the substrate biasing of the output stage has an effect on the produced voltages.
Thus, what is needed are devices and methods to inhibit degradation in the output voltages in charge pump circuits.
SUMMARY OF THE INVENTION
The above mentioned problems with charge pump circuits and other problems are addressed by the present invention and will be understood by reading and studying the following specification. Devices and methods are described which accord these benefits.
An illustrative embodiment describes a charge pump circuit comprising a number of boosting stages to boost a voltage signal. The circuit also includes an output stage coupled to the boosting stages to output the voltage signal. A gate circuit is coupled to the output stage to control the output stage. And the circuit further includes a parasitic inhibitor circuit coupled to the output stage to inhibit at least one parasitic effect in the output stage.
In another illustrative embodiment a method is described to transfer power in an output stage of a charge pump circuit while inhibiting at least one parasitic effect of a transistor. The method includes receiving a high voltage pulse signal that is coupled to a source of an output transistor, receiving a first clock signal that is coupled to the source of the output transistor, and receiving a second clock signal that is coupled to the source of a bias transistor. The second clock signal is 180 degrees out of phase with respect to the first clock signal. The method further includes charging a capacitor to a predetermined level to inhibit at least one parasitic effect. One plate of the capacitor is connected to a well-bias of the output transistor and the other plate is connected to ground. The method further includes outputting the full range of the high voltage pulse signals at the drain of the output transistor.
These and other embodiments, aspects, advantages, and features of the present invention will be set forth in part in the description which follows, and in part will become apparent to those skilled in the art by reference to the following description of the invention and referenced drawings or by practice of the invention. The aspects, advantages, and features of the invention are realized and attained by means of the instrumentalities, procedures, and combinations particularly pointed out in the appended claims.
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Favrat, P., et al., “A High-Efficiency CMOS Voltage Doubler”,IEEE Journal of Solid-State Circuits, 33, 410-416, (Mar. 1998).
Kawahura, T., et al., “Bit-Line Clamped Sensing Multiplex and Accurate High Voltage Generator for Quarter-Micron Flash Memories”,IEEE Journal of Solid-State Circuits, 31, 1590-1598, (Nov. 1996).
Cunningham Terry D.
Micro)n Technology, Inc.
Schwegman Lundberg Woessner & Kluth P.A.
Tra Quan
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