Dynamic magnetic information storage or retrieval – General recording or reproducing – Specifics of the amplifier
Reexamination Certificate
1995-04-14
2002-01-22
Faber, Alan T. (Department: 2651)
Dynamic magnetic information storage or retrieval
General recording or reproducing
Specifics of the amplifier
C360S066000
Reexamination Certificate
active
06341046
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention pertains to preamplifiers for magnetoresistive elements. Specifically, it pertains to a preamplifier having a programmable bias reference current, electrical isolation among a plurality of multiplexed elements, and improved feedback control of a bias current source.
Magnetoresistive (MR) elements are especially useful in MR heads for reading high-density binary data stored on magnetic media. The resistance of MR elements depends on the magnitude and direction of an applied magnetic field. Hence, the resistance of an MR element changes as the magnetic field of an adjacent magnetic medium moves relative to the element. When the element is properly coupled to an amplifier, the amplifier senses, or detects, the resistance of the element as a voltage or current signal corresponding to the magnetic field of the medium. Other circuitry may then decode the signal to retrieve the stored data.
The resistance changes of MR elements are generally nonlinear. Thus, to improve utility, it is common to electrically and magnetically bias an MR element to operate within an optimal range of its operating characteristic. Electrical biasing entails applying a voltage or current to the element to establish a steady-state, baseline resistance against which resistance changes induced by the magnetic medium may be reliably detected. Electrical biasing requires coupling the MR element to a preamplifier.
In its basic form, the preamplifier comprises a bias circuit, which sets the baseline resistance of the MR element, and a differential amplifier, which is parallel-coupled to the element. Although the bias circuit may be as simple as coupling the element between two voltage or current sources, it may also include a feedback control system. The feedback control system measures, or senses, either a voltage or current of the MR element indicating an actual bias condition, compares the measured voltage or current to a desired voltage or current reference representing a desired bias condition, and adjusts the bias voltage or current source to achieve the desired biasing. Using feedback is advantageous because it maintains the desired biasing as the element varies with temperature, age, and wear.
One type of preamplifier for MR heads uses a feedback bias circuit having a current-bias-voltage-sense (CBVS) architecture. The CBVS architecture signifies a feedback bias circuit which controls a bias current source by sensing a voltage of the MR element. In feedback terms, the preamplifier compares an actual head voltage to a desired voltage and adjusts a current source according to a difference between the actual and desired voltages. The CBVS architecture provides two important advantages over other feedback architectures.
One advantage stems from using voltage sensing instead of current sensing to control the biasing. Current-sensing circuitry monitors the bias status of the head by using two conductive leads to parallel-couple the sensing circuitry to the head. This arrangement, however, is problematic, because the two leads typically have a low input resistance and parasitic inductance which combine to introduce a low-frequency pole into the transfer function of the amplifier parallel-coupled to the head. The low-frequency pole reduces the bandwidth of the amplifier. Voltage sensing, on the other hand, avoids this problem because voltage-sensing circuitry has a high input resistance. The high input resistance of the voltage-sensing circuitry effectively isolates this circuitry from the amplifier, leaving the bandwidth of the amplifier intact.
The second advantage of the CBVS architecture arises from using current biasing rather than voltage biasing. Current biasing entails biasing the head between a pair of balanced current sources. In other words, one terminal of the head is coupled to the output of a current source and the other to the input of a current sink. This biasing scheme permits maintaining the head at an arbitrary voltage while voltage biasing does not. Preferably, the arbitrary voltage equals the voltage of the disc surface to prevent arcing between the head and disc. Arcing can occur when the element comes close to the disc, if the voltage difference between the disc and the head is sufficiently large. Specifically, where the disc and head are separated by less than 10 micro-inches, a voltage difference exceeding a few hundred millivolts may cause arcing. Thus, it is desirable to maintain equality of the head and disc voltages to eliminate the risk of arcing. Current biasing facilitates this effort.
U.S. Pat. No. 4,870,610, issued to Jove et al. (Jove), discloses a preamplifier implementing the CBVS architecture.
FIG. 1
is a block diagram of the Jove preamplifier, showing an MR head R
H
biased between dependent current source I
BIAS
and independent current sink I
REF
. A junction between equivalent resistors R
1
and R
2
derives a center voltage of head R
H
. A differential feedback amplifier A, comparing the center voltage to a reference voltage V
REF
, drives current source I
BIAS
. Differential output amplifier B amplifies a voltage across the terminals of head R
H
The preamplifier maintains approximate equality of the center voltage of head R
H
and reference voltage V
REF
by varying the current output from source I
BIAS
around a quiescent reference current set by current sink I
REF
. Accordingly, if head R
H
contacts or nearly contacts a magnetic disc having a potential equal to V
REF
, the low voltage difference between the element and the disc prevents arcing. Moreover, resistors R
1
and R
2
have large resistances compared to head R
H
, providing a high input resistance and effectively isolating the feedback loop from amplifier B. Thus, the Jove preamplifier provides the advantages of the CBVS architecture. It, however, is also beset by numerous problems.
One problem with the Jove preamplifier is that it does not permit programming the value of reference current sink I
REF
. As shown in
FIG. 1
, current sink I
REF
is an independent current sink. As such, its level of current input is not directly adjustable, thereby limiting the flexibility of the bias circuit to respond to changing head conditions. Moreover, the ability to independently define this current is particularly important in transducers comprising a plurality of MR heads multiplexed to common bias circuitry. Heads inevitably differ; therefore, to ensure consistent biasing and performance of all heads, the bias current should be tailored to each head. Accordingly, providing a convenient means for programming, or adjusting, current sink I
REF
would advance the art.
Another problem with the Jove preamp arises from using it with a plurality of selectable, or multiplexed, MR heads.
FIG. 2
shows the Jove preamp configured for two selectable MR heads. For sake of clarity, the biasing circuit comprising current source I
BIAS
, current sink I
REF
, differential amplifier A, and related switching transistors for coupling selectively to heads R
HA
R
HB
are not shown. In
FIG. 2
, two emitter-coupled differential transistor pairs Q
1A
-Q
2A
and Q
1B
-Q
2B
serve as output amplifiers for respective heads R
HA
R
HB
. Transistors Q
1A
and Q
1B
and transistors Q
2A
and Q
2B
are parallel-coupled such that the emitters of transistors Q
1A
and Q
1B
are coupled to current source I
1
and to a first terminal of impedance Z
E
, and the emitters of transistors Q
2A
and Q
2B
are coupled to current source I
2
and a second terminal of impedance Z
E
. Thus, impedance Z
E
, an emitter-coupling impedance, couples the emitters of transistors Q
1A
and Q
2A
and the emitters of transistors Q
1B
and Q
2B
. The collectors of parallel-coupled transistors Q
1A
and Q
1B
and parallel-coupled transistors Q
2A
and Q
2B
are connected to voltage supply V
S1
(not shown) via respective resistors R
c1
and R
c2
. The bases of transistor pair Q
1A
-Q
2A
are connected to the first and second terminals of MR head R
HA
, and the bases of transistor pair Q
1B
-Q
2B
are connected similarly t
Agere Systems Guardian Corp.
Faber Alan T.
Kinney & Lange
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