Redundant scheme for CAMRAM memory array

Details Redundant scheme for CAMRAM memory array Redundant scheme for CAMRAM memory array

2001-05-21

2002-05-07

Hoang, Huan (Department: 2818)

Static information storage and retrieval

Associative memories

Ferroelectric cell

C365S200000, C365S189070

Reexamination Certificate

active

06385071

ABSTRACT:

BACKGROUND INFORMATION
A content addressable memory (CAM) may be described as a device in which a binary data input pattern is compared with stored data patterns to find a matching binary pattern. When the CAM detects such a match, it provides an address or location (called a match address). It is known in some system architectures for a CAM to scan a random address memory (RAM) cell to find the matching data pattern, and such a structure and method is known as a CAMRAM memory array.
The present invention relates to CAMRAM memory array structures, and in particular to CAMRAM's on Application Specific Integrated Circuit (ASIC) chip micro-controller processor cores. It is known to use CAM and RAM structures, singly or in combination, to provide a “redundancy function” in ASIC applications. A redundancy function may be utilized when a program driving the ASIC identifies defective row addresses. The redundancy function selects and provides a replacement row of good addresses, and a corrected matchline/wordline association is created.
ASIC applications are being designed with progressively increasing sizes of memory elements, but upon a progressively decreasing silicon device geometry, and accordingly more and more imperfect ASIC chips are produced. What is needed is a method and structure that will improve manufacturing yield while meeting the ASIC design demands. With the increasing size of memory elements, along with the requirement of faster access time and smaller available areas on ASIC chips, improved architecture of the CAMRAM base design is desired to address these issues effectively. What is also needed is a redundant scheme for a CAMRAM that will improve manufacturing yield and not result in any extra performance penalty in the operation of the ASIC.
SUMMARY OF THE INVENTION
A content addressable memory (CAM) structure and method that provides a redundant scheme for an ASIC. The scheme comprises a CAM comparative means for bypassing normal encoders including a fuse structure having a fuse address list and a “CAM row compare” structure. Redundancy is provided in “CAM Search Read” and “CAM Search Read and RAM Read” operations. Normal CAM memory address rows and redundant replacement CAM memory address rows are provided for bank addresses. A miss logic is provided for detecting a bank address miss and generating a responsive miss signal, and an “address out” logic is also provided to pass only one of a generated normal CAM memory address row, redundant replacement address row or miss signal in a bank. The method and structure can support different address sizes and different cache sizes, allowing user versatility in design and application. Accordingly, the present invention offers advantages in improved manufacturing yields, performance and portability.


REFERENCES:
patent: 3633175 (1972-01-01), Harper
patent: 5088066 (1992-02-01), Castro
patent: 5319589 (1994-06-01), Yamagata et al.
patent: 5576985 (1996-11-01), Holtz
patent: 5666482 (1997-09-01), McClure
patent: 5675543 (1997-10-01), Rieger
patent: 5953745 (1999-09-01), Lattimore et al.
patent: 5958068 (1999-09-01), Arimilli et al.
patent: 6006313 (1999-12-01), Fukumoto
patent: 6023746 (2000-02-01), Arimilli et al.
patent: 6098150 (2000-08-01), Brethour et al.
patent: 6275406 (2001-08-01), Gibson et al.
IBM Technical Disclosure Bulletin, vol. 28, No. 6, entitled “System for Efficiently Using Spare Memory Components for Defect Corrections Employing Content-Addressable Memory”, Nov., 1985.

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