Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing
Reexamination Certificate
2000-09-06
2002-07-23
Cunningham, Terry D. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Synchronizing
C327S538000
Reexamination Certificate
active
06424191
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the field current sink circuits. More particularly, the present invention relates to current sink circuits characterized by having increased output impedance.
2. Related Art
High speed digital systems, such as engineering workstations and personal computers, require clock sources that have low jitter and low phase lock loop (PLL) bandwidths. Phase jitter in a system clock reduces the effective clock speed of the workstation or personal computer. More processing performance is gained, for a given clock rate, if the clock signal has less jitter. The PLL circuitry typically contains a voltage controlled oscillator (VCO) that receives a voltage level maintained by filter components. Normally, charging currents and voltage controlled oscillator gains are so high that externally situated filter components are required to achieve the low jitter and bandwidth requirements. However, external, e.g., “off-chip,” filter components (e.g., capacitors, etc.) increase the overall cost of the digital system in part by making manufacturing more complex, but also by increasing the physical size of the digital system. Further, off-chip filter components also decrease system reliability by increasing the phase jitter by allowing external noise to be injected into the clock circuit through the PLL filter. Clock jitter is reduced if external elements of the PLL loop filter can be eliminated. To integrate filter components “on-chip,” it is necessary to use smaller sized filter components. However, this leads to tighter filter leakage requirements because smaller sized capacitors are more sensitive to changes in current when compared to larger sized capacitors.
It is desired to reduce the effects of leakage current within a PLL circuit because as discussed above on-chip filter components are very sensitive to small leakage currents. PLL filters are normally driven by current source or current sink circuits and require outputs having very high impedance. A problem exists in eliminating off-chip filters and placing them on-chip. Namely, reducing the size of the filters (thereby allowing them to be placed on-chip) unfortunately also makes these components more sensitive to leakage current which impedes the ideal operation of certain PLL circuits. As a result, it is desired to use current sources that have reduced leakage current to drive differential filters for higher PLL accuracy. At the same time, this circuitry needs to operate from increasingly lower power supply voltages; e.g., to accommodate hand-held and other portable battery operated applications.
In operation, a PLL circuit injects current into filter components to establish a voltage at the input of a voltage controlled oscillator circuit in order to alter the frequency of oscillation of the PLL. This current is then ideally held constant over a long period of time (e.g., a “hold time”) to maintain the oscillation frequency. Leakage across the filter component during the hold time, which exists between PLL correction pulses, will charge the filter component thereby changing its voltage. This changing voltage causes time jitter in the clock frequency because it changes the input voltage to the internal voltage controlled oscillator circuit. Therefore, it is necessary to reduce leakage current associated with the PLL filter component in order to provide an accurate oscillation frequency.
One method for reducing leakage current associated with the PLL filter component is to increase the output impedance, Ro, of the current source or sink which can be used to supply current to the PLL filter component, e.g., a capacitor.
FIG. 1
illustrates a single transistor prior art embodiment of a current sink circuit
10
. The transistor
14
has its emitter (E) coupled to the low side
18
(e.g., ground) of a power supply, its base (B) coupled to a DC bias voltage
20
and its collector (C) coupled to the current output node
30
. As shown, the output node
30
of the current sink circuit
10
is also coupled to an exemplary voltage load
16
which is coupled to the power supply
12
. The dashed element
32
is not a physical component but merely models the output impedance, Ro, of the current sink circuit
10
. In this configuration, the output impedance, Ro, is a function of the early voltage (Ve) of the transistor
14
divided by the current, Ic, through the transistor
14
and is represented by:
Ro=Ve/Ic=(kT/q)/Ic
where k, T and q are well known values defined by the physics of the transistor
14
. In a typical case, Ve is 6 volts and Ic is 20 uA so Ro is approximately 300 K ohms as shown by:
Ro=6 volts/20 uA 300 K ohms.
In the general case, Ro can vary higher and lower by a factor of two for the current source
10
as shown in FIG.
1
.
FIG. 2
illustrates another prior art implementation
50
which improves the output impedance of the current sink circuit. The improvement is gained by the addition of an emitter degeneration resistor, RE,
26
. Resistor
26
is placed between the low side
18
and the emitter (E) of transistor
14
. Some of the extra current injected by a change in collector voltage at (C) is reinjected through the emitter (E) and this current partially cancels the extra current. Therefore, the fraction of the extra current reinjected depends on the ratio of 1/gm to RE. In this configuration, the output impedance, R′o, of current sink circuit
50
is expressed as:
R′o=Ro(1+gm*RE)
where Ro is the output impedance of current sink circuit
10
of FIG.
1
and gm is a well known constant defined by the physics of transistor
14
. Assuming RE is on the order of 1 K ohm resistance, and gm is approximately 1×10
−4
, then the output impedance, R′o, of the current sink circuit
50
becomes:
R′o=Ro(1+0.8)=1.8*Ro.
Although the value of R′o represents approximately an 80% increase in output impedance over the output impedance of the current sink circuit
10
of
FIG. 1
, a current sink circuit having an higher output impedance would even further reduce the effects of leakage current.
SUMMARY OF THE INVENTION
Accordingly, what is needed is a current sink circuit having a higher output impedance than realized by the prior art current sink circuits described above. What is further needed is a low side current sink circuit (e.g., one coupled to the low side of the voltage supply) having a higher output impedance than realized by the prior art current sink circuits described above. What is also needed is a low side current sink circuit having a higher output impedance than realized by the prior art current sink circuits described above that can also effectively operate within a low power supply voltage environment. Such a current sink can advantageously be used to alter the charge on an integrated circuit capacitor. The present invention provides these advantageous capabilities.
A low side low power current sink circuit is described herein having improved output impedance to reduce effects of leakage current. The present invention includes a current sink circuit having a transistor with its emitter coupled to an emitter degeneration resistor which is coupled to the low side (e.g., ground) of a power supply. The output of the current sink is taken at the collector of the transistor. In one embodiment, the transistor is an NPN transistor device. The base of the transistor is coupled to the output of an operational amplifier. One input of the operational amplifier is coupled in a feedback loop to the emitter of the transistor. A direct current bias voltage is applied to the other input of the operational amplifier. In this arrangement, two feedback loops are used and the output impedance (R″o) of the current is sink is based on the open loop gain of the operational amplifier (e.g., about 35 dB) and is therefore orders of magnitude larger than the output impedance of other prior art current sink designs.
The novel design of the present invention also limits the voltage d
Edwards Stephen D.
Nayebi Mehrdad
Shapiro Phil
Cunningham Terry D.
Sony Electronics Inc.
Tra Quan
Wagner , Murabito & Hao LLP
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