Adjustment circuit for voltage division

Details Adjustment circuit for voltage division Adjustment circuit for voltage division

2002-03-14

2002-09-24

Riley, Shawn (Department: 2838)

Electrical transmission or interconnection systems

Plural load circuit systems

Common conductor or return type

C323S297000

Reexamination Certificate

active

06455952

ABSTRACT:

FIELD OF THE INVENTION
This invention relates generally to an adjustment circuit for voltage division, particularly to an adjustment circuit applicable to a voltage divider with constant current for adjusting divided resistance or resolution in a respectively larger scope while keeping the total resistance unchanged.
BACKGROUND OF THE INVENTION
A voltage divider is implemented frequently in circuits to divide voltage for output of an expected voltage value. For convenience, an adjustable voltage divider is preferred for trimming in the case an offset to some extent is found in the value of the expected output voltage.
In a conventional adjustment method shown in
FIG. 1
, a serial resistor R
n
(n=0, 1, 2 . . . N) is connected in series and paired in parallel with a corresponding switch S
0
, S
1
. . . S
N
apiece to form an adjustable voltage-dividing resistor &Dgr;R, and an output voltage V
o
equal to V
dd
(R
out
+&Dgr;R′)/(R
in
+R
out
+&Dgr;R) is obtained (where &Dgr;R′ is a valid portion of voltage-dividing resistor equal to 0 or &Dgr;R). Examples are presented as in the following:
If the switches S
A
and S
B
are turned “ON” while the rest switches don't care, then
V
o
=V
dd
×R
out
÷(
R
in
+R
out
).
If the switch S
A
is turned “ON” only while the rest switches are turned “OFF”; then
V
o
=V
dd
×(R
out
+R
0
+R
1
+R
2
+R
3
+ . . . +R
n
)/(
R
in
+R
out
+R
0
+R
1
+R
2
+R
3
+ . . . +R
n
).
If the switches S
A
and S
0
are turned “ON” while the rest switches are turned “OFF”; then
V
o
=V
dd
×(
R
out
+R
1
+R
2
+R
3
+ . . . +R
n
)/(
R
in
+R
out
+R
1
+R
2
+R
3
+ . . . +R
n
).
If the switches S
A
, S
0
, and S
1
are turned “ON” while the rest switches are turned “OFF”; then
V
o
=V
dd
×(
R
out
+R
2
+R
3
+R
4
+ . . . +R
n
)/(
R
in
+R
out
+R
2
+R
3
+R
4
+ . . . +R
n
).
If the switch S
B
is turned “ON” only while the rest switches are turned “OFF”; then
V
o
=V
dd
×R
out
/(
R
in
+R
out
+R
0
+R
1
+R
2
+R
3
+ . . . +R
n
).
If the switch S
B
and S
0
are turned “ON” while the rest switches are turned “OFF”; then
V
o
=V
dd
×R
out
/(
R
in
+R
out
+R
1
+R
2
+R
3
+ . . . +R
n
).
If the switches S
B
, S
0
, and S
1
are turned “ON” while the rest switches are turned “OFF”; then
V
o
=V
dd
×R
out
/(
R
in
+R
out
+R
2
+R
3
+R
4
+ . . . +R
n
).
The switches are properly controlled such that the adjustable voltage-dividing resistor &Dgr;R can be adjusted proportionally to obtain a desired output voltage Vo. Now, suppose R
n
=2
n
R, then &Dgr;R=(S
0
2
0
+S
1
2
1
+ . . . +S
n
2
n
)R, where S
n
is 0 or 1. When S
n
in
FIG. 1
is turned “ON”, S
n
is 0, otherwise, S
n
is 1 and R=1 accordingly, so that &Dgr;R is adjustable proportionally in the range of (S
0
2
0
+S
1
2
1
+ . . . +S
n
2
n
) as mentioned. However, such a voltage divider structure is inapplicable to a voltage division system that requires a constant current because of its variable resultant resistance and current, and is defective in adjusting or providing multiple outputs V
o
.
For improvement, an amended design has been proposed later on as shown in
FIG. 2
, wherein an adjustable voltage-dividing resistor &Dgr;R comprises a serial resistor R
n
including resistor R
0
, R
1
, R
2
, . . . R
n
connected in series and corresponding switch S
0
, S
1
, . . . S
n
in parallel to obtain an output voltage V
01
=V
dd
×(R
out 1
+R
out 2
+&Dgr;R
1
′+&Dgr;R
2
)/(R
in
+R
out 1
+R
out 2
+&Dgr;R
1
+&Dgr;R
2
), where &Dgr;R
1
′ is a variable and another output voltage V
02
=V
dd
×(R
out 2
+&Dgr;R
2
′)/(R
in
+R
out 1
+R
out 2
+&Dgr;R
1
+&Dgr;R
2
), where &Dgr;R
2
′ is a variable.
Taking V
01
for example, adjustment may be made as the following:
If the switch S
0
is turned “ON” while the rest switches are turned “OFF”, then
V
01
=V
dd
×(
R
out 1
+R
out 2
+R
0
+R
1
+ . . . +R
n
+&Dgr;R
2
)/(
R
in
+R
out 1
+R
out 2
+R
0
+R
1
+ . . . +R
n
+&Dgr;R
2
).
If the switch S
1
is turned “ON” while the rest switches are turned “OFF”, then
V
01
=V
dd
×(
R
out 1
+R
out 2
+R
1
+ . . . +R
n
+&Dgr;R
2
)/(
R
in
+R
out 1
+R
out 2
+R
0
+R
1
+ . . . +R
n
+&Dgr;R
2
).
The variable valid voltage-dividing resistor &Dgr;R
1
′ can be adjusted to obtain a desired or multiple outputs V
o
by controlling the switches properly in a voltage division system operated under a constant current, whereas, the voltage-dividing resistor &Dgr;R is not suited to be adjusted proportionally in the range of (S
0
2
0
+S
1
2
1
+ . . . +S
n
2
n
).
SUMMARY OF THE INVENTION
The primary object of this invention is to provide an adjustment circuit for voltage division, which is implemented in an adjustable voltage-dividing resistor &Dgr;R comprising a symmetrically mapped serial resistor(R
n
) and paired switches(S
n
), wherein a valid portion of voltage-dividing resistor &Dgr;R′ can be adjusted proportionally in the range of (S
0
R
0
+S
1
R
1
+ . . . +S
n
R
n
).
For more detailed information regarding advantages or features of this invention, at least an example of preferred embodiment will be elucidated below with reference to the annexed drawings.


REFERENCES:
patent: 5867057 (1999-02-01), Hsu et al.

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