Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2008-03-25

2008-03-25

Phung, Anh (Department: 2824)

Static information storage and retrieval

Addressing

Sync/clocking

C365S194000

Reexamination Certificate

active

07349290

ABSTRACT:
A semiconductor memory device is provided. The semiconductor memory device includes: a first input/output control unit for changing a sensing node into a first level in response to an activation of a first enabling signal for enabling an output of a data synchronized with a rising edge of a clock signal; a second input/output control unit for changing the sensing node into a second level in response to a delay locked clock signal as the second input/output control unit is enabled when the first enabling signal and a second enabling signal for enabling an output of a data synchronized with a falling edge of the clock signal are disabled; an output unit for outputting an input/output control signal; and a data output driver for outputting a data as the data output driver is activated in response to a first level of the input/output control signal.

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