Vertical conduction power electronic device package and...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead

Reexamination Certificate

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Details

C257S658000, C257S673000, C257S686000, C257S677000, C257S729000, C257S678000, C257S672000, C257S676000, C257SE23044, C257SE23031, C257SE23001, C257SE23034

Reexamination Certificate

active

07372142

ABSTRACT:
A vertical conduction power electronic device package and corresponding assembly method comprising at least a metal frame suitable to house at least a plate or first semiconductor die having at least a first and a second conduction terminal on respective opposed sides of the first die. The first conduction terminal being in contact with said metal frame and comprising at least an intermediate frame arranged in contact with said second conduction terminal.

REFERENCES:
patent: 5532512 (1996-07-01), Fillion et al.
patent: 6774466 (2004-08-01), Kajiwara et al.
patent: 2002/0096748 (2002-07-01), Pavier
patent: 2003/0052405 (2003-03-01), Moriguchi
patent: 19902462 (2000-08-01), None
patent: 0179714 (1986-04-01), None
patent: 1187204 (2002-03-01), None
European Search Report, EP04425399, Jan. 10, 2005.
MOSFET BGA Design Guide—Fairchild Semiconductor, Aug. 2002.

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