Structure and method for loading RAM data within a programmable

Details Structure and method for loading RAM data within a programmable Structure and method for loading RAM data within a programmable

1996-01-30

1998-07-28

Trans, Vincent N.

Boots, shoes, and leggings

364488, 326 41, 326 39, H03K 19177, H03K 17693

Patent

active

057870071

ABSTRACT:
A method and apparatus for loading memory within a reconfigurable programmable logic device including configuring the device as a RAM loader circuit, loading the RAM with data and then reconfiguring the device with a circuit utilizing the loaded RAM. The inventive method and apparatus allow use of the RAM as high density functional centers of the desired design immediately upon initialization of the circuit, without wasting valuable time or FPGA resources on a static, non-flexible RAM loader structure.

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"The Programmable Logic Data Book", pp. 2-7 to 2-46, copyright 1994, Xilinx, Inc., 2100 Logic Drive, San Jose, CA 95124.

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