Patent
1988-04-13
1990-10-30
Hille, Rolf
357 54, 357 55, H01L 2968, H01L 2934, H01L 2906
Patent
active
049672487
ABSTRACT:
For increasing a retaining time period of a data bit, there is disclosed a semiconductor memory cell comprising a switching transistor and a storage capacitor fabricated in a semiconductor substrate formed with a heavily doped layer and a lightly doped layer, a transition layer graded in impurity atom concentration is produced between the heavily doped layer and the lightly doped layer, and the storage capacitor comprises (a) a first electrode formed by a first side wall portion of the lightly doped layer, a second side wall portion of the heavily doped layer and a bottom wall portion of the heavily doped layer, (b) a dielectric film formed in the first and second side wall portions and the bottom wall portion and defining a trench and (c) a second electrode formed on the trench and contacting the dielectric film, wherein the dielectric film has a relatively thin portion and a relatively thick portion which covers the transition layer so as to reduce in strength of electric field around the transition layer.
Hille Rolf
Limanek Robert P.
NEC Corporation
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