Floating-point processing unit for successive floating-point...

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

Reexamination Certificate

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Reexamination Certificate

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07917567

ABSTRACT:
A floating-point processing unit for a succession of floating-point operations. An exponent adjustor is coupled to receive numerical inputs and configured to generate first adjusted values from the numerical inputs. The first adjusted values have equivalent exponents as between corresponding first adjusted values. A first operation specific floating-point processing unit (OFPU) is coupled to receive the first adjusted values and includes first arithmetic circuitry configured for a first floating-point operation on the first adjusted values to provide first numerical results. The first numerical results are not normalized prior to a second floating-point operation.

REFERENCES:
patent: 6904446 (2005-06-01), Dibrino
patent: 7730117 (2010-06-01), Fleischer et al.
patent: 2003/0041082 (2003-02-01), Dibrino
patent: 2006/0179097 (2006-08-01), Fleischer et al.

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