Semiconductor memory and memory system

Details Semiconductor memory and memory system Semiconductor memory and memory system

2011-08-09

2011-08-09

Dinh, Son (Department: 2824)

Static information storage and retrieval

Addressing

Plural blocks or banks

C365S236000

Reexamination Certificate

active

07995419

ABSTRACT:
A semiconductor memory that assigns M data groups, each data group including N data, to a first address, where M and N are integers equal to or larger than 2; and wherein L data among N data is designated by a second address indicating a position of the data groups and the L data is read from the designated position, where L is an integer and L<N.

REFERENCES:
patent: 6055619 (2000-04-01), North et al.
patent: 6324115 (2001-11-01), Choi
patent: 6928024 (2005-08-01), Pfeiffer et al.
patent: 2005/0268027 (2005-12-01), Katsuki et al.
patent: 2005-339348 (2005-12-01), None
Ware, Frederick, A. et al.,Micro-threaded Row and Column Operation in a DRAM Core, Rambus White Paper, Rambus Inc., Mar. 2005, 1-7.

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