Semiconductor memory device, system with semiconductor...

Details Semiconductor memory device, system with semiconductor... Semiconductor memory device, system with semiconductor...

2008-01-08

2008-01-08

Hoang, Huan (Department: 2827)

Static information storage and retrieval

Addressing

Sync/clocking

C365S189050, C365S189090

Reexamination Certificate

active

07317657

ABSTRACT:
The invention relates to a semiconductor memory device, a system with a semiconductor memory device, and a method for operating a semiconductor memory device, comprising the steps of reading out a data value, in particular a CAS latency time data value (CL) stored in a memory; activating or deactivating a device provided on said semiconductor memory device in support of a high speed operation, as a function of the data value (CL) stored.

REFERENCES:
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patent: 6675304 (2004-01-01), Pole et al.
patent: 2004/0042255 (2004-03-01), Labrum et al.
Jung, Y. et al. (2001). “A Dual-Loop Delay-Locked Loop Using Multiple Voltage-Controlled Delay Lines,”IEEE Journal of Solid-State Circuits36(5):784-791.

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