Information processing system emulation apparatus and method

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3642323, 36492781, 364DIG1, G06F 900

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active

050937766

ABSTRACT:
For use in an information processing system 10, the system including a system bus 16 having a system address bus 16a and a system data bus 16b and at least two data processors 12 and 14 coupled to the system bus, emulation apparatus for enabling a first one of the data processors to execute, in conjunction with a second one of the data processors, a program requiring access to predetermined address locations associated with a specific type of device, typically an I/O device. The specific type of device is either not resident within the system or is resident at different address locations. The emulation apparatus includes circuitry 30 for detecting an occurrence of an access cycle by the first data processor to the predetermined address location, circuitry 50 for halting the first data processor before completion of the access cycle and circuitry 50 for notifying the second data processor that the first data processor is halted. The emulation apparatus further includes circuitry 24a for indicating to the second data processor a value of the predetermined address location being accessed and a type of access to the predetermined address location. The second data processor includes circuitry for interpreting the address value and type of access, for accessing a corresponding address location having a same type of specific device or a corresponding type of device and for causing the first data processor to be released to complete the access cycle.

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