Electrostatic discharge protection device for mixed voltage...

Details Electrostatic discharge protection device for mixed voltage... Electrostatic discharge protection device for mixed voltage...

2008-07-01

2008-07-01

Nguyen, Danny (Department: 2836)

Electricity: electrical systems and devices

Safety and protection of systems and devices

Load shunting by fault responsive means

C361S111000

Reexamination Certificate

active

07394630

ABSTRACT:
An electrostatic discharge protection circuit that includes at least two transistors connected in a stacked configuration, a first diffusion region of a first dopant type shared by two adjacent transistors, and a second diffusion region of a second dopant type formed in the first diffusion region. A substrate-triggered site is induced into the device structure of the stacked transistors to improve ESD robustness and turn-on speed. An area-efficient layout to realize the stacked transistors is proposed. The stacked transistors may be implemented in ESD protection circuits with a mixed-voltage I/O interface, or in integrated circuits with multiple power supplies. The stacked transistors are fabricated without using a thick-gate mask.

REFERENCES:
patent: 5151762 (1992-09-01), Uenishi et al.
patent: 5565375 (1996-10-01), Hiser et al.
patent: 5612566 (1997-03-01), Williams
patent: 5623156 (1997-04-01), Watt
patent: 5625280 (1997-04-01), Voldman
patent: 5716866 (1998-02-01), Dow et al.
patent: 5780897 (1998-07-01), Krakauer
patent: 5831316 (1998-11-01), Yu et al.
patent: 5956219 (1999-09-01), Maloney
patent: 6140375 (2000-10-01), Nagahama et al.
patent: 6143610 (2000-11-01), Wen et al.
patent: 6365932 (2002-04-01), Kouno et al.
patent: 6369994 (2002-04-01), Voldman
patent: 6466423 (2002-10-01), Yu
patent: 6469560 (2002-10-01), Chang et al.
patent: 6529035 (2003-03-01), Schroeder et al.
patent: 6573765 (2003-06-01), Bales et al.
patent: 6638801 (2003-10-01), Manabe
patent: 6657835 (2003-12-01), Ker et al.
patent: 6744107 (2004-06-01), Ker et al.
patent: 6809386 (2004-10-01), Chaine et al.
patent: 6812531 (2004-11-01), Baldi et al.
patent: 6862160 (2005-03-01), Maloney et al.
patent: 6867957 (2005-03-01), Tong et al.
patent: 6906387 (2005-06-01), Reese et al.
patent: 6977408 (2005-12-01), Lin et al.
patent: 2004/0041215 (2004-03-01), Chaine et al.
patent: 07-263689 (1995-10-01), None

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