Embedded interconnects, and methods for forming same

Details Embedded interconnects, and methods for forming same Embedded interconnects, and methods for forming same

2011-01-11

2011-01-11

Lee, Calvin (Department: 2892)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified configuration

C438S280000, C438S666000

Reexamination Certificate

active

07868461

ABSTRACT:
The present invention relates to a semiconductor device comprising first and second active device regions that are located in a semiconductor substrate and are isolated from each other by an isolation region therebetween, while the semiconductor device comprises a first conductive interconnect structure that is embedded in the isolation region and connects the first active device region with the second active device region. The semiconductor device preferably contains at least one static random access memory (SRAM) cell located in the semiconductor substrate, and the first conductive interconnect structure cross-connects a pull-down transistor of the SRAM cell with a pull-up transistor thereof. The conductive interconnect preferably comprises doped polysilicon and can be formed by processing steps including photolithographic patterning, etching, and polysilicon deposition.

REFERENCES:
patent: 6417549 (2002-07-01), Oh
patent: 6812574 (2004-11-01), Tomita et al.
patent: 7365432 (2008-04-01), Liaw
patent: 7560382 (2009-07-01), Yang et al.
patent: 2003/0071357 (2003-04-01), Trivedi

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