Amplifier arrangement and method for signal amplification

Amplifiers – With semiconductor amplifying device – Including differential amplifier

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C330S051000, C330S254000, C330S261000

Reexamination Certificate

active

07924093

ABSTRACT:
An amplifier arrangement comprises a signal input (Iin+, Iin−) to receive a signal to be amplified, a signal output (Out) to provide an amplified signal, an amplifier stage (AS) coupled between the signal input (Iin+, Iin−) and the signal output (Out), a switchable dynamic biasing stage (DB) with an input coupled to the signal input (Iin+, Iin−), a switchable gain boosting stage (GB) with an input coupled to the signal input (Iin+, Iin−), and a switching device (SD) coupled to the amplifier stage (AS) such that either an output of the switchable dynamic biasing stage (DB) or an output of the switchable gain boosting stage (GB) are coupled to the amplifier stage (AS). In one embodiment, by enabling the switchable dynamic biasing stage (DB) in an initial large-signal phase of amplification and the switchable gain boosting stage (GB) in a latter small-signal phase of amplification by means of the switching device (SD), high gain and low current consumption are simultaneously realised. Furthermore, a method for signal amplification is disclosed.

REFERENCES:
patent: 6177838 (2001-01-01), Chiu
patent: 6307430 (2001-10-01), Thomsen et al.
patent: 7170338 (2007-01-01), Tucker
patent: 7741910 (2010-06-01), Wong
K. Bult et al., “A Fast-Settling CMOS Op Amp for SC Circuits with 90-dB DC Gain”, IEEE Journal of Solid-State Circuits, vol. 25, No. 6, pp. 1379-1384, Dec. 1990.
L. Callewaert et al., “Class AB CMOS Amplifiers with High Efficiency”, IEEE Journal of Solid-State Circuits, vol. 25, No. 3, pp. 684-691, Jun. 1990.
R. Castello et al., “A High-Performance Micropower Switched-Capacitor Filter”, IEEE Journal of Solid-State Circuits, vol. SC-20, No. 6, pp. 1122-1132, Dec. 1985.
M. Helfenstein, et al., “90dB, 90MHz, 30mW OTA with the Gain-Enhancement Implemented by One- and Two-Stage Amplifiers”, 1995 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1732-1735, XP000559036, Apr. 30, 1995.
A.J. Lopez-Martin et al., “Low-Voltage Super Class AB CMOS OTA Cells With Very High Slew Rate and Power Efficiency”, IEEE Journal of Solid-State Circuits, vol. 40, No. 5, pp. 1068-1077, May 2005.
D. Miyazaki et al, “A 10-b 30-MS/s Low-Power Pipelined CMOS A/D Converter Using a Pseudodifferential Architecture”, IEEE Journal of Solid-State Circuits, vol. 38, No. 2, pp. 369-373, Feb. 2003.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Amplifier arrangement and method for signal amplification does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Amplifier arrangement and method for signal amplification, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Amplifier arrangement and method for signal amplification will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2733423

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.