Method, system, and computer program product to generate...

Data processing: software development – installation – and managem – Software program development tool – Translation of code

Reexamination Certificate

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Details

C717S158000, C717S130000, C717S134000, C717S124000

Reexamination Certificate

active

07877742

ABSTRACT:
A method, system, and computer program product for generating terminating, pseudo-random test instruction streams, including forward and backward branching instructions. A first instruction stream is generated, including at least one backward branching instruction and at least one forward branching instruction. Each backward branching instruction is preceded by at least one forward branching instruction, which is used to guarantee termination of the loop formed by the backward branching instruction. Backward branching targets are resolved when the backward branching instruction is inserted into the first instruction stream. Forward branching targets remain unresolved in the first instruction stream. A set of potential branch targets is determined for each forward branching instruction. For each forward branching instruction, a branch target is randomly selected from the set of potential branch targets for that forward branching instruction. The final terminating instruction stream consists of the first stream, with all forward branch targets resolved.

REFERENCES:
patent: 5237536 (1993-08-01), Ohtsuki
patent: 5303355 (1994-04-01), Gergen et al.
patent: 5506976 (1996-04-01), Jaggar
patent: 5646974 (1997-07-01), Wu et al.
patent: 5909573 (1999-06-01), Sheaffer
patent: 5956478 (1999-09-01), Huggins
patent: 6003128 (1999-12-01), Tran
patent: 6145076 (2000-11-01), Gabzdyl et al.
patent: 6380730 (2002-04-01), Arkin et al.
patent: 6401196 (2002-06-01), Lee et al.
Glenstrup, et al. “Termination Analysis and Specialization-Point Insertion in Offline Partial Evaluation”, 2005, ACM, p. 1147-1215.
“Generation of Design Verification Tests from Behavioral VHDL Programs Using Path Enumeration and Contraint Programming”, by Vemuri et al, IEEE Transactions On Very Large Scale Integration (VLSI) Systems, vol. 3, No. 2, Jun. 1995, pp. 201-214.
“Bounding Loop Iterations for Timing Analysis” by Healy et al, Proceedings of Technology and Application Symposium, 1998, pp. 12-21.
“Compile-Time and Runtime Analysis of Active Behaviors” by E. Baralis et al, IEEE Transactions on Knowledge and Data Engineering, vol. 10, No. 3, May/Jun. 1998, pp. 353-370.
“Software Specialization Via Symbolic Execution” by A. Coen-Porisini et al, IEEE Transactions On Software Engineering, vol. 17, No. 9, Sep. 1991, pp. 884-899.

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