Field effect transistor and method of manufacturing the same

Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Field effect transistor

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257192, H01L 29778

Patent

active

061630411

ABSTRACT:
A field effect transistor has a preselected build up resistance with respect to an I-V characteristic of the transistor. In this event, a first GaAs layer is formed on a GaAs substrate. Further, an AlGaAs layer is formed on the first GaAs layer and has a predetermined impurity concentration and a preselected Al composition ratio. Moreover, a gate electrode is placed on the AlGaAs layer to form a schottky contact with the AlGaAs layer. In addition, a second GaAs layers are arranged on both sides of the gate electrode via a recess and are formed on said AlGaAs layer. Finally, source and drain electrodes are formed on the second GaAs layers. With such a structure, the Al composition ratio is determined within a preselected range defined by a relationship between the impurity concentration and the build up resistance.

REFERENCES:
patent: 4236166 (1980-11-01), Cho
patent: 5028968 (1991-07-01), O'Loughlin
patent: 5300795 (1994-04-01), Saunier
patent: 5343056 (1994-08-01), Nakagawa
patent: 5381027 (1995-01-01), Usagawa
patent: 5900653 (1999-05-01), Suzuki
Zhou, X., "Monte Carlo Formulation of Field-Dependent Mobility For Al.sub.x Ga.sub.1-x As", Solid-State Electronics, 38:1264-66 (1995).

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