Transistor with gain variation compensation

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Charge transfer device

Reexamination Certificate

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Details

C257S286000, C257S401000, C257SE27131, C257SE29200

Reexamination Certificate

active

07982247

ABSTRACT:
A semiconductor device and method of making comprises providing an active device region and an isolation region, the isolation region forming a boundary with the active device region. A patterned gate material overlies the active device region between first and second portions of the boundary. The patterned gate material defines a channel within the active device region, the gate material having a gate length dimension perpendicular to a centerline along a principal dimension of the gate material which is larger proximate the first and second portions of the boundary than in-between the first and second portions of the boundary. The channel includes a first end proximate the first portion of the boundary and a second end proximate the second portion of the boundary, further being characterized by gate length dimension tapering on both ends of the channel.

REFERENCES:
patent: 6750518 (2004-06-01), Nishibe et al.
patent: 7348244 (2008-03-01), Aoki et al.
patent: 7402844 (2008-07-01), Sriram
patent: 2002/0113277 (2002-08-01), Mehrotra et al.
patent: 11-017167 (1999-01-01), None
patent: 2000049240 (2000-02-01), None
patent: 2003060197 (2003-02-01), None
PCT Application PCT/US2009/048648 Search Report and Written Opinion, mailed Jan. 28, 2010.

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