Method and apparatus for manufacturing stacked-type...

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor

Reexamination Certificate

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C438S107000, C438S127000, C257SE23040

Reexamination Certificate

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07871856

ABSTRACT:
A method of manufacturing a stacked-type semiconductor device, comprises: arranging a plurality of stacked chips obtained by stacking semiconductor chips on a plurality of stages on a support substrate; connecting a semiconductor chip of each stage in each stacked chip and the support substrate by wire while performing heating in units of stacked chips; performing plastic molding of each stacked chip; and separating the stacked chips from each other; an apparatus for manufacturing a stacked-type semiconductor device, comprising divided heater blocks formed under a support substrate on which a plurality of stacked chips obtained by stacking a plurality of semiconductor chips are arranged, the divided heater blocks being formed with respect to the stacked chips, and a heating device to selectively transmit heat to a stacked chip subjected to a wire bonding.

REFERENCES:
patent: 6071759 (2000-06-01), Sugita et al.
patent: 6544864 (2003-04-01), Reeder et al.
patent: 6737750 (2004-05-01), Hoffman et al.
patent: 2000-294723 (2000-10-01), None
patent: 2002-9102 (2002-01-01), None
patent: 2002-294723 (2002-10-01), None
patent: 2003-179092 (2003-06-01), None
Notification of Reasons for Rejection issued by the Japanese Patent Office on May 22, 2009, for Japanese Patent Application No. 2004-234461, and English-language translation thereof.

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