Insulated gate semiconductor device and method of manufacturing

Details Insulated gate semiconductor device and method of manufacturing Insulated gate semiconductor device and method of manufacturing

1996-02-13

1998-09-01

Crane, Sara W.

Active solid-state devices (e.g., transistors, solid-state diode

Conductivity modulation device

257133, 257220, 257242, 257244, 257263, 257302, 257328, H01L 2358, H01L 27148

Patent

active

058014080

ABSTRACT:
A parasitic transistor of an insulated gate semiconductor device does not easily turn on, so that an SOA of the insulated gate semiconductor device is improved. P.sup.+ semiconductor layers (45) having a higher impurity concentration than that N.sup.+ emitter layers (44) are disposed so that the P.sup.+ semiconductor layers (45) overlap adjacent edges of the N.sup.+ emitter layers (44) of a U-type IGBT and so that bottom portions of the P.sup.+ semiconductor layers (45) contact P base layers (43). An emitter electrode (51) contacts the P base layers (43) through the P.sup.+ semiconductor layers (45). A trench pitch is small, and therefore, a parasitic transistor which is formed by an N.sup.+ emitter region (4), a P base layer (3) and an N.sup.- layer (2) does not easily turn on.

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Proceedings of the International Symposium on Power Semiconductor Devices, pp. 411-416, May 31, 1994 M. Harada, et al., "600V Trench IGBT, in Comparison with Planar IGBT--An Evaluation of the Limit of IGBT Performance".

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