Stable high efficiency step-up voltage regulator with fast...

Details Stable high efficiency step-up voltage regulator with fast... Stable high efficiency step-up voltage regulator with fast...

2011-04-26

2011-04-26

Laxton, Gary L (Department: 2838)

Electricity: power supply or regulation systems

Output level responsive

Using a three or more terminal semiconductive device as the...

Reexamination Certificate

active

07932709

ABSTRACT:
A regulator circuit and a method of generating a stable, low-ripple output, step-up or step-down voltage are disclosed. A low ESR (Equivalent Series Resistance) output capacitor is employed to provide low output voltage ripple. A voltage, −VESRi, is generated using information based on an input voltage and the output voltage. −VESRiis coupled onto an intermediate reference voltage generated by an integrator based on the output voltage and a constant reference voltage, to form another voltage, VREFi. VREFiis coupled to an input of a feedback comparator, instead of a plain constant reference voltage, to modulate the duty cycle of a main switch. The output voltage is inputted as a feedback signal to another input of the feedback comparator. −VESRi, is generated using information based on an input voltage and the output voltage in such a way that output voltage is stable without sub-harmonic oscillation.

REFERENCES:
patent: 7642758 (2010-01-01), Morong et al.
Prior Art #1 Conventional Fixed Frequency PWM Based Boost Converter, Fig. 1A, 1B and Fig. 2, disclosed on Oct. 30, 2007, 2 pgs.
Prior Art #2 Conventional Constant On-Time (COT) based Boost Converter, Fig. 3 and 4, disclosed on Oct. 30, 2007, 3 pgs.

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