Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Physical design processing
Reexamination Certificate
2011-04-05
2011-04-05
Chiang, Jack (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Integrated circuit design processing
Physical design processing
C716S130000
Reexamination Certificate
active
07921397
ABSTRACT:
Standard cell libraries and methods of designing semiconductor integrated circuits are provided. At least one of delay-adjusting cell data and load-capacitor cell data is stored in the cell library for a specified type standard cell in addition to the standard cell data. The specified type standard cell may be utilized as a delay-adjusting cell or a load-capacitor cell. Accordingly, precise adjustment of delay times during designing a semiconductor integrated circuit is enabled without requiring registering a new standard cell in the cell library. Semiconductor integrated circuits are also provided that are configured to allow precise adjustment of delay times in the semiconductor integrated circuits.
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Bowers Brandon W
Chiang Jack
Kawasaki Microelectronics Inc.
Oliff & Berridg,e PLC
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