Non-volatile multilevel memory cell programming

Static information storage and retrieval – Floating gate – Multiple values

Reexamination Certificate

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Details

C365S185240, C365S185120, C365S185170

Reexamination Certificate

active

07864575

ABSTRACT:
Embodiments of the present disclosure provide methods, devices, modules, and systems for programming an array of non-volatile multilevel memory cells to a number of threshold voltage ranges. One method includes programming a lower page of a first wordline cell to increase a threshold voltage (Vt) of the first wordline cell to a first Vt within a lowermost Vt range. The method includes programming a lower page of a second wordline cell prior to programming an upper page of the first wordline cell. The method includes programming the upper page of the first wordline cell such that the first Vt is increased to a second Vt, wherein the second Vt is within a Vt range which is then a lowermost Vt range and is positive.

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United States Patent and Trademark Office Action for Parent U.S. Appl. No. 11/646,815 dated Feb. 25, 2009 (9pgs.).
International Search Report for related U.S. Non-Provisional parent matter, mailed May 9, 2008.

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