Nonvolatile semiconductor memory device

Details Nonvolatile semiconductor memory device Nonvolatile semiconductor memory device

2011-03-15

2011-03-15

Nguyen, Viet Q (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S196000, C365S207000, C365S189090, C365S189070, C365S190000

Reexamination Certificate

active

07907453

ABSTRACT:
Provided is a nonvolatile semiconductor memory device which reads out a memory cell at high speed. A minute current source (105) is connected to a clamp NMOS transistor (103) for clamping a drain voltage of a memory cell (101), and a minute current is caused to flow through the clamp NMOS transistor (103). When the current does not flow through the memory cell (101), by causing the minute current to flow through the clamp NMOS transistor (103), the drain voltage of the memory cell (101) is prevented from rising. A bias voltage (BIAS) to be input to the clamp NMOS transistor (103) can be set high and the drain voltage of the memory cell (101) can also be high, and hence a current value of the memory cell (101) becomes larger and speed of sensing a current of a sense amplifier circuit (104) is improved.

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