Non-volatile memory with power-saving multi-pass sensing

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185250, C365S185220, C365S185030

Reexamination Certificate

active

07965560

ABSTRACT:
A non-volatile memory device capable of reading and writing a large number of memory cells with multiple read/write circuits in parallel has features to reduce power consumption during sensing, which is included in read, and program/verify operations. A sensing verify operation includes one or more sensing cycles relative to one or more demarcation threshold voltages to determine a memory state. In one aspect, coupling of the memory cells to their bit lines are delayed during a precharge operation in order to reduced the cells' currents working against the precharge. In another aspect, a power-consuming precharge period is minimized by preemptively starting the sensing in a multi-pass sensing operation. High current cells not detected as a result of the premature sensing will be detected in a subsequent pass.

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