Memory systems with memory chips down and up

Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C361S764000, C361S783000, C361S778000

Reexamination Certificate

active

07990737

ABSTRACT:
In some embodiments, a system includes a memory controller chip, memory chips on a first substrate, and a module connector. A first group of conductors is included to provide read data signals from at least some of the memory chips to the memory controller chip, and a second group of conductors to provide read data signals from the connector to the memory controller chip. The module connector may receive a continuity card or memory module. Other embodiments are described.

REFERENCES:
patent: 5974513 (1999-10-01), Matsuo et al.
patent: 5991819 (1999-11-01), Young
patent: 6273759 (2001-08-01), Perino et al.
patent: 6438012 (2002-08-01), Osaka et al.
patent: 6674648 (2004-01-01), McCall et al.
patent: 6742098 (2004-05-01), Halbert et al.
patent: 6766385 (2004-07-01), Dodd et al.
patent: 6785190 (2004-08-01), Bains et al.
patent: 6831924 (2004-12-01), Cornett et al.
patent: 6877071 (2005-04-01), Sherman
patent: 6889304 (2005-05-01), Perego et al.
patent: 6954822 (2005-10-01), Bains et al.
patent: 6961831 (2005-11-01), Ware et al.
patent: 7024518 (2006-04-01), Halbert et al.
patent: 7411806 (2008-08-01), Funaba et al.
patent: 2001/0040796 (2001-11-01), Kollipara et al.
patent: 2002/0023191 (2002-02-01), Fudeyasu
patent: 2002/0084458 (2002-07-01), Halbert et al.
patent: 2002/0144166 (2002-10-01), Chang et al.
patent: 2004/0236921 (2004-11-01), Bains
patent: 2005/0071536 (2005-03-01), Osborne
patent: 2005/0071541 (2005-03-01), Osborne
patent: 2005/0091460 (2005-04-01), Rotithor et al.
patent: 2005/0108469 (2005-05-01), Freeman et al.
patent: 2005/0144375 (2005-06-01), Bains et al.
“PCT/US2006/047114 International Search Report and Written Opinion”, (May 7, 2007).
Office Action Received for Chinese Patent Application No. 200680041302.7, mailed on Apr. 8, 2011, 4 pages of Office Action and 5 pages of English translation and pending claims.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Memory systems with memory chips down and up does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Memory systems with memory chips down and up, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory systems with memory chips down and up will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2680053

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.