Semiconductor integrated circuit device and method of...

Static information storage and retrieval – Floating gate – Multiple values

Reexamination Certificate

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C365S185170

Reexamination Certificate

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07965549

ABSTRACT:
A semiconductor integrated circuit device includes a memory cell array. In the memory cell array, first memory cells of floating gate type are mixed with second memory cells of floating gate type. The second memory cell is sandwiched between the first memory cells. The first memory cells of floating gate type are configured to store m-level data, where m is a natural number of 2 or more. The second memory cells of floating gate type is configured to store n-level data, where n is a natural number greater than m.

REFERENCES:
patent: 6064591 (2000-05-01), Takeuchi et al.
patent: 7539053 (2009-05-01), Kanda
patent: 2006/0202257 (2006-09-01), Kutsukake et al.
patent: 2008/0112221 (2008-05-01), Park et al.
patent: 2008/0205148 (2008-08-01), Kanda
patent: 2004-192789 (2004-07-01), None
patent: 1999013057 (1999-02-01), None
Korean Office Action dated Jan. 28, 2009.

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